DAC-08ED ON Semiconductor, DAC-08ED Datasheet - Page 10

DAC-08ED

Manufacturer Part Number
DAC-08ED
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of DAC-08ED

Number Of Channels
1
Resolution
8b
Interface Type
Parallel
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±15V
Settling Time
0.135us
Architecture
Current Steering
Power Supply Requirement
Dual
Output Type
Current
Integral Nonlinearity Error
±0.19LSB
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±4.5V
Dual Supply Voltage (max)
±18V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
16
Package Type
SOIC
Lead Free Status / Rohs Status
Not Compliant

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Settling Time
are switched on, which corresponds to a low-to-high
transition for all input bits. This time is typically 70 ns for
settling to within LSB for 8-bit accuracy. This time applies
when R
switch is the least significant bit, which typically turns on
and settles in 65 ns. In applications where the DAC
The worst-case switching condition occurs when all bits
L
< 500 W and C
V
NOTES:
D
D
C
C
Q
C
REF
1
3
1
2
1
4
, D
, C
, C
= IN914 or equivalent
= 0.01mF
= 2N3904
2
3
5
= 10V
= IN6263 or equivalent
= 0.1mF
= 15pF and includes all probe and fixturing capacitance.
R
15
I
O
REF
= 5kW
< 25 pF. The slowest single
R
= 2mA
14
I
NOTES:
(LOW T.C.)
FS
= 5kW
[
R
REF
) V REF
Figure 24. Settling Time and Propagation Delay
R REF
14
15
+V
Figure 25. Basic DAC−08 Configuration
5
REF
I
x
REF
255
256
6
7
; I
8
O
V
DUT
16
DAC−08 SERIES
IN
9
) I
http://onsemi.com
14
15
10
C
MSB 2 3 4 5 6 7 LSB
V−
O
1
0.1mF
11
3
5
3
+ I
12
V
6 7 8 9 10 11 12
C
C
S
FS
COMP
2
16
− = −15V
10
for all logic states
DAC-08
1
functions in a positive-going ramp mode, the worst-case
condition does not occur and settling times less than 70 ns
may be realized.
usually is the dominant factor in satisfactory test results
when measuring settling time. Short leads, 100 mF supply
bypassing for low frequencies, minimum scope lead
length, and avoidance of ground loops are all mandatory.
V+
C
13
Extra care must be taken in board layout since this
2
5
4
1
0.1mF
V
R
50W
OUT
1
= 1000W
4
2
V
S
Q
+ = +15V
1
D
R
1
2
= 1000W
D
2
I
I
O
O
C
C
3
4
D
3
R
3
= 500W
V
V
OUT
ADJ

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