MC68HC705C8ACB Freescale Semiconductor, MC68HC705C8ACB Datasheet - Page 146

• Manufacturer Part Number: MC68HC705C8ACB
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705C8ACB

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 2.1MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 304Byte
• # I/os (max): 24
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 42
• Package Type: SPDIP
• Lead Free Status / Rohs Status: Not Compliant

Serial Peripheral Interface (SPI)
11.6 Serial Clock Polarity and Phase
Technical Data
146
CPHA
0
1
0
1
CPOL
0
0
1
1
CAPTURE STROBE
SDO/SDI
SCK (A)
SCK (B)
SCK (C)
SCK (D)
SS
To accommodate the different serial communication requirements of
peripheral devices, software can change the phase and polarity of the
SPI serial clock. The clock polarity bit (CPOL) and the clock phase bit
(CPHA), both in the SPCR, control the timing relationship between the
serial clock and the transmitted data.
and CPHA bits affect the clock/data timing.
Figure 11-5. Two Master/Slaves and Three Slaves Block Diagram
MSB
Freescale Semiconductor, Inc.
MASTER/SLAVE
For More Information On This Product,
Figure 11-6. SPI Clock/Data Timing
PD2/MISO
PD3/MOSI
MCU 1
PORT
PD4/SCK
I/O
PD5/SS
BIT 6
Serial Peripheral Interface (SPI)
0
1
2
3
Go to: www.freescale.com
BIT 5
SLAVE MCU 2
BIT 4
SLAVE MCU 1
BIT 3
Figure 11-6
BIT 2
SLAVE MCU 0
BIT 1
MC68HC705C8A — Rev. 3
shows how the CPOL
LSB
MASTER/SLAVE
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
0
1
2
3
MCU 2
PORT
I/O