STK12C68-P45 Cypress Semiconductor Corp, STK12C68-P45 Datasheet - Page 6

• Manufacturer Part Number: STK12C68-P45
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK12C68-P45

• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 65mA
• Lead Free Status / Rohs Status: Not Compliant

STK12C68, STK12C68-5 (SMD5962-94599)
Document Control #ML0008 Rev 2.0
HARDWARE MODE SELECTION
Note m: HSB STORE operation occurs only if an SRAM WRITE has been done since the last nonvolatile cycle. After the STORE (if any) completes, the
Note n: The six consecutive addresses must be in the order listed. W must be high during all six consecutive E controlled cycles to enable a nonvolatile
Note o: I/O state assumes G < V
HARDWARE STORE CYCLE
Note p: E and G low for output behavior.
Note q: E and G low and W high for output behavior.
Note r:
HARDWARE STORE CYCLE
DQ (DATA OUT)
NO.
22
23
24
25
26
E
H
X
L
L
L
L
HSB (OUT)
June, 2008
part will go into standby mode, inhibiting all operations until HSB rises.
cycle.
t
HSB (IN)
RECOVER
Standard
t
t
t
t
t
STORE
DELAY
RECOVER
HLHX
HLBL
W
H
H
H
X
L
X
is only applicable after t
SYMBOLS
HSB
H
H
H
H
H
L
Alternate
t
t
t
HIGH IMPEDANCE
HLHZ
HLQZ
HHQX
IL
. Activation of nonvolatile cycles does not depend on state of G.
A
12
DATA VALID
- A
0AAA
0AAA
1FFF
0F0F
1FFF
0F0E
0000
1555
10F0
0000
1555
10F0
STORE
X
X
X
X
0
t
STORE Cycle Duration
Time Allowed to Complete SRAM Cycle
Hardware STORE High to Inhibit Off
Hardware STORE Pulse Width
Hardware STORE Low to Store Busy
HLHX
(hex)
25
t
HLBL
26
is complete.
t
DELAY
23
Nonvolatile RECALL
Nonvolatile
Nonvolatile STORE
Not Selected
Read SRAM
Write SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
PARAMETER
6
MODE
t
STORE
22
STORE
Output DataOutput
Output High Z
Output High Z
Output High Z
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Input Data
Data
I/O
t
RECOVER
24
(V
MIN
STK12C68-5
15
STK12C68,
1
CC
POWER
Standby
Active
Active
Active
Active
= 5.0V ± 10%)
l
l
CC 2
CC2
MAX
700
300
10
HIGH IMPEDANCE
UNITS NOTES
ms
μs
ns
ns
ns
DATA VALID
NOTES
n, o
n, o
m
o
i, p
i, q
p, r
e