MB91F376G Fujitsu Components, MB91F376G Datasheet - Page 67

• Manufacturer Part Number: MB91F376G
• Manufacturer: Fujitsu Components

Specifications of MB91F376G

• Lead Free Status / Rohs Status: Not Compliant

■ MODE SETTING
(1) Mode Pins
(2) Mode Register (MODR)
MD2
The FR50 of devices uses mode pins (MD2 to MD0) and a mode register (MODR) to set the operation mode.
Three mode pins (MD2 to MD0) are used to specify the reset mode vector access area.
The data to be written to 0000 07FD
MODR is located at 0000 07FD
operation mode. MODR is set only when a reset factor (INIT level) occurs. User programs cannot write data to
MODR.
< Mode Register (MODR) >
[Bits 7 to 3] : (Reserved bits)
Always set 00000 at bits 7 to 3. Operation is not guaranteed when other values are set.
[Bit 2] : ROMA (internal ROM enable bit)
The ROMA bit is used to set whether to validate the internal ROM area (F-bus memory area) .
0
0
remaining settings
ROMA
Mode Pins
0
1
MD1
0000 07FD
0
0
Address
MD0
External ROM mode
Internal ROM mode
0
1
H
External ROM mode vector
Internal ROM mode vector
7
0
Function
Mode name
H
6
0
. After an operation mode has been set in MODR, the device operates in this
⎯
H
using mode vector fetch is called mode data.
5
0
4
0
Reset vector
access area
External
Internal
Access to the F-bus area is external.
3
0
⎯
Operation mode setting bit
ROMA
2
The mode register is used to set the bus
width.
Reserved
WTH1
MB91360G Series
1
WTH0
Remarks
0
Remarks
XXXXXXXX
Initial value
B
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