MB91F376G Fujitsu Components, MB91F376G Datasheet - Page 178

• Manufacturer Part Number: MB91F376G
• Manufacturer: Fujitsu Components

Specifications of MB91F376G

• Lead Free Status / Rohs Status: Not Compliant

178
MB91360G Series
27. Subclock
Note : On MB91F362GB SELCLK should always be connected to “1”, subclock operation is not implemented on
(1) Operation of subclock (SELCLK = 0)
RTC4M32K
RTC4M32K
The Subclock System provides various power saving modes. The key of the concept is to supply the 32 kHz
clock signal only to the Real Time Clock RTC) Module, while the rest of the MCU is provided with 4 MHz clock
signal in order to achieve lower power supply current in the RTC32K mode.
This behavior can be altered by the configuration input, SELCLK pin to switch the RTC module to operate with
the 4 MHz clock. The following sections describe the operation with SELCLK connected to “0” and SELCLK
connected to “1” respectively.
The next table summarizes the operation states of the components related to the Subclock System.To simplify
this table SLEEP modes are not listed but the operation is the same as for RUN modes except that the CPU is
stopped.
The following table summarizes those operation modes and necessary software settings.
It is recommended that PLL2EN is set to “1” after the initialization to start the 32 kHz oscillation and this bit
should be kept at “1” during the operation. Otherwise the 32 kHz oscillator does not start. Also bits 9 and 10 of
the CLKR register (address 0046
RTC32K
RTC32K
STOP
STOP
Mode
Mode
RUN
RUN
those devices.
Power Dissipation
Medium Low
STOP
Lowest
0
1
1
1
High
Low
Don’t Care
Don’t Care
Don’t Care
PLL1EN
H
0 or 1
) should always be set to “0” during operation.
4 M Osc.
Stop
Stop
Run
Run
Don’t Care
PLL2EN
32 K Osc.
Software Setting
1
1
1
Stop
Run
Run
Run
Operation of Components
Don’t Care
OSCD1
RTC
Stop
Run
Run
Run
0
1
1
Don’t Care
Peripheral
OSCD2
CPU &
Stop
Stop
Stop
Run
0
0
1
Don’t Care
Don’t Care
Don’t Care
Stop/Run
RTC32
Stop
Stop
Stop
PLL
1