PCF8584P NXP Semiconductors, PCF8584P Datasheet - Page 9

• Manufacturer Part Number: PCF8584P
• Manufacturer: NXP Semiconductors

Specifications of PCF8584P

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: PDIP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

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In receiver mode the data from the shift register is copied to the read buffer during the acknowledge phase. Further
reception of data is inhibited (SCL held LOW) until the S0 read buffer is read (see Section 6.8.1.1).
In the transmitter mode data is transmitted to the I
enabled (ESO = 1).
Remarks:
1. A minimum of 6 clock cycles must elapse between consecutive parallel-bus accesses to the PCF8584 when the
2. To start a read operation immediately after a write, it is necessary to read the S0 read buffer in order to invoke
6.8
Register S1 controls I
signal on register select input A0. For more efficient communication between microcontroller/processor and the I
register S1 has separate read and write functions for all bit positions (see Fig.3). The write-only section provides register
access control and control over I
Table 4 Control/status register S1
Notes
1. For further information see Section 6.8.1.
2. For further information see Section 6.8.2.
3. Logic 1 if not-initialized.
1997 Oct 21
CONTROL/STATUS
I
2
I
reception of the first byte (‘dummy read’ of the address). Immediately after the acknowledgement, this first byte will
be transferred from the shift register to the read buffer. The next read will then transfer the correct value of the first
byte to the microcontroller bus (see Fig.7).
2
C-bus controller
C-bus controller operates at 8 or 12 MHz. This may be reduced to 3 clock cycles for lower operating frequencies.
Control/status register S1
Control
Status
(2)
(1)
I
2
C-Bus SDA line
2
C-bus operation and provides I
to/from
PIN
PIN
2
C-bus signals, while the read-only section provides I
ESO
DB7
0
(3)
Fig.4 Data shift register/bus buffer S0.
DB6
Data Shift Register S0 and Read Buffer
ES1
STS
to/from microcontroller parallel bus
DB5
2
C-bus as soon as it is written to the S0 shift register if the serial I/O is
2
Shift register
C-bus status information. Register S1 is accessed by a HIGH
DB4
Read Buffer
BER
ES2
9
DB3
BITS
AD0/LRB
DB2
ENI
DB1
AAS
STA
DB0
MBE705
Read
only
2
C-bus status information.
STO
LAB
Write
only
Product specification
ACK
BB
PCF8584
write only
read only
MODE
2
C-bus,