MT48H16M16LFBF-6:HTR Micron Technology Inc, MT48H16M16LFBF-6:HTR Datasheet - Page 58

MT48H16M16LFBF-6:HTR

Manufacturer Part Number
MT48H16M16LFBF-6:HTR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H16M16LFBF-6:HTR

Lead Free Status / Rohs Status
Compliant
Figure 28: Random WRITE Cycles
Figure 29: WRITE-to-READ
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Note:
Note:
Command
Command
Address
Address
1. Each WRITE command can be issued to any bank. DQM is LOW.
1. The WRITE command can be issued to any bank, and the READ command can be to any
bank. DQM is LOW. CL = 2 for illustration.
CLK
CLK
DQ
DQ
WRITE
WRITE
Bank,
Bank,
Col n
Col n
D
D
T0
T0
IN
IN
WRITE
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Bank,
Col a
NOP
D
T1
T1
D
IN
IN
58
WRITE
Bank,
Col x
READ
Bank,
Col b
D
T2
T2
IN
Don’t Care
Micron Technology, Inc. reserves the right to change products or specifications without notice.
WRITE
Bank,
Col m
T3
T3
NOP
D
IN
D
NOP
T4
OUT
Don’t Care
NOP
D
T5
OUT
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation

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