MT48H16M16LFBF-6:HTR Micron Technology Inc, MT48H16M16LFBF-6:HTR Datasheet - Page 48

MT48H16M16LFBF-6:HTR

Manufacturer Part Number
MT48H16M16LFBF-6:HTR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H16M16LFBF-6:HTR

Lead Free Status / Rohs Status
Compliant
Figure 17: Consecutive READ Bursts
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Note:
Command
Command
Address
Address
1. Each READ command can be issued to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
T0
T0
Bank,
READ
READ
Col n
Bank,
Col n
CL = 2
CL = 3
T1
T1
NOP
NOP
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
48
T2
T2
NOP
NOP
D
OUT
n
T3
T3
NOP
NOP
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D
D
n + 1
OUT
OUT
READ
T4
READ
T4
Bank,
Bank,
Col b
Col b
X = 1 cycle
D
n + 2
D
Transitioning data
OUT
OUT
X = 2 cycles
T5
T5
NOP
NOP
D
D
n + 3
OUT
OUT
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T6
T6
NOP
NOP
READ Operation
D
D
OUT
OUT
b
Don’t Care
T7
NOP
D
OUT

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