LFXP3E-4TN100I Lattice, LFXP3E-4TN100I Datasheet - Page 315

• Manufacturer Part Number: LFXP3E-4TN100I
• Description: IC FPGA 3.1KLUTS 62I/O 100-TQFP
• Manufacturer: Lattice

Specifications of LFXP3E-4TN100I

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 13-8. Wake Up Sequences Supported by LatticeXP (Continued)
Figure 13-7. Wake Up Sequence to Internal Clock
Synchronous to Internal Done Bit
If the LatticeXP device is the only device in the chain, or the last device in a chain, the wake up process should be
initiated by the completion of the configuration. Once the configuration is complete, the internal Done bit will be set
and then the wake up process will begin.
Synchronous to External DONE Signal
The DONE pin can be selected to delay wake up. If DONE_EX is true then the wake up sequence will be delayed
until the DONE pin is high. The device will then follow the WAKE_UP sequence selected.
Software Selectable Options
In order to control the configuration of the LatticeXP device beyond the default settings, software preferences are
used. Table 13-9 is a list of the preferences with their default settings.
21 (Default)
Sequence
GLOBAL OUTPUT ENABLE
GLOBAL WRITE DISABLE
22
23
24
25
GLOBAL SET/RESET
DONE PIN
DONE BIT
CLK
Phase T0
GOE
GOE, GWDIS
GWDIS
GWDIS, GSR
GOE, GSR
T0
Phase T1
13-16
T1
LatticeXP sysCONFIG Usage Guide
GWDIS, GSR
GSR
GOE, GSR
GOE
GWDIS
T2
Phase T2
T3
DONE
DONE
DONE
DONE
DONE
Phase T3