LFEC1E-3TN144I Lattice, LFEC1E-3TN144I Datasheet - Page 35
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFEC1E-3TN144I
Manufacturer Part Number
LFEC1E-3TN144I
Description
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC1E-3TN144I
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC1E-3TN144I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 35 of 163
- Download datasheet (962Kb)
Architecture
Lattice Semiconductor
LatticeECP/EC Family Data Sheet
be shifted in and loaded directly onto test nodes, or test data to be captured and shifted out for verification. The test
access port consists of dedicated I/Os: TDI, TDO, TCK and TMS. The test access port has its own supply voltage
V
and can operate with LVCMOS3.3, 2.5, 1.8, 1.5 and 1.2 standards.
CCJ
For more details on boundary scan test, please see information regarding additional technical documentation at
the end of this data sheet.
Device Configuration
All LatticeECP/EC devices contain two possible ports that can be used for device configuration. The test access
port (TAP), which supports bit-wide configuration, and the sysCONFIG port that supports both byte-wide and serial
configuration.
The TAP supports both the IEEE Std. 1149.1 Boundary Scan specification and the IEEE Std. 1532 In-System Con-
figuration specification. The sysCONFIG port is a 20-pin interface with six of the I/Os used as dedicated pins and
the rest being dual-use pins (please refer to TN1053 for more information about using the dual-use pins as general
purpose I/O). There are four configuration options for LatticeECP/EC devices:
1. Industry standard SPI memories.
2. Industry standard byte wide flash and ispMACH 4000 for control/addressing.
3. Configuration from system microprocessor via the configuration bus or TAP.
4. Industry standard FPGA board memory.
On power-up, the FPGA SRAM is ready to be configured with the sysCONFIG port active. The IEEE 1149.1 serial
mode can be activated any time after power-up by sending the appropriate command through the TAP port. Once a
configuration port is selected, that port is locked and another configuration port cannot be activated until the next
power-up sequence.
For more information about device configuration, please see the list of technical documentation at the end of this
data sheet.
Internal Logic Analyzer Capability (ispTRACY)
All LatticeECP/EC devices support an internal logic analyzer diagnostic feature. The diagnostic features provide
capabilities similar to an external logic analyzer, such as programmable event and trigger condition and deep trace
memory. This feature is enabled by Lattice’s ispTRACY. The ispTRACY utility is added into the user design at com-
pile time.
For more information about ispTRACY, please see information regarding additional technical documentation at the
end of this data sheet.
External Resistor
LatticeECP/EC devices require a single external, 10K ohm +/- 1% value between the XRES pin and ground.
Device configuration will not be completed if this resistor is missing. There is no boundary scan register on the
external resistor pad.
2-32
Related parts for LFEC1E-3TN144I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFEC1E-3T100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 67 IO 1.2V -3 Spd I
Manufacturer:
Lattice
![LFEC1E-3Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 1.5K LUTs 112 IO 1.2 V -3 Spd I
Manufacturer:
Lattice
![LFEC1E-4TN144C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeEC Family 1500 Cells 378MHz 130nm (CMOS) Technology 1.2V 144-Pin TQFP
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFEC1E-3T100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-3TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-3TN100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-3TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-4TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-3QN208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 112I/O 208-PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-5TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-5TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-4TN100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 100TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-4QN208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 208PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-3QN208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 208PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC1E-4TN144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 1.5KLUTS 144TQFP
Manufacturer:
Lattice
Datasheet: