DP83848IVV National Semiconductor, DP83848IVV Datasheet - Page 59

• Manufacturer Part Number: DP83848IVV
• Manufacturer: National Semiconductor

Specifications of DP83848IVV

• Lead Free Status / Rohs Status: Compliant

Bit
7
6
5
4
3
2
1
0
HEARTBEAT_DIS
FORCE_LINK_10
JABBER_DIS
RESERVED
RESERVED
RESERVED
POLARITY
Bit Name
LP_DIS
Table 30. 10Base-T Status/Control Register (10BTSCR), address 0x1A
Default
RO/LH
0, RW
0, RW
0, RW
0, RW
1, RW
0, RW
0, RW
Normal Link Pulse Disable:
1 = Transmission of NLPs is disabled.
0 = Transmission of NLPs is enabled.
Force 10Mb Good Link:
1 = Forced Good 10Mb Link.
0 = Normal Link Status.
RESERVED:
Must be zero.
10Mb Polarity Status:
This bit is a duplication of bit 12 in the PHYSTS register. Both bits
will be cleared upon a read of 10BTSCR register, but not upon a
read of the PHYSTS register.
1 = Inverted Polarity detected.
0 = Correct Polarity detected.
RESERVED:
Must be zero.
RESERVED:
Must be set to one.
Heartbeat Disable: This bit only has influence in half-duplex 10Mb
mode.
1 = Heartbeat function disabled.
0 = Heartbeat function enabled.
When the device is operating at 100Mb or configured for full
duplex operation, this bit will be ignored - the heartbeat func-
tion is disabled.
Jabber Disable:
Applicable only in 10BASE-T.
1 = Jabber function disabled.
0 = Jabber function enabled.
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Description
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