74LVC2G53DP,125 NXP Semiconductors, 74LVC2G53DP,125 Datasheet - Page 22
![IC MUX/DEMUX 2X1 8TSSOP](/photos/5/43/54394/8-tssop_sot505-2_pkg_sml.jpg)
74LVC2G53DP,125
Manufacturer Part Number
74LVC2G53DP,125
Description
IC MUX/DEMUX 2X1 8TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
Analog Multiplexerr
Datasheet
1.74LVC2G53DC125.pdf
(28 pages)
Specifications of 74LVC2G53DP,125
Package / Case
8-TSSOP
Function
Multiplexer/Demultiplexer
Circuit
1 x 2:1
On-state Resistance
6 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
1.65 V ~ 5.5 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
1 Channel
On Resistance (max)
34 Ohm (Typ) @ 1.95 V
On Time (max)
6.7 ns (Typ) @ 1.95 V
Off Time (max)
6.8 ns (Typ) @ 1.95 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
Single
Switch Current (typ)
0.0001 mA @ 5.5 V
Package
8TSSOP
Maximum On Resistance
195@1.95V Ohm
Maximum Propagation Delay Bus To Bus
2.5@1.95V@-40C to 125C|1.5@2.7V@-40C to 125C|1@3.6V@-40C to 125C|0.8@5.5V@-40C to 125C ns
Maximum Low Level Output Current
50 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
6.8(Typ)@1.95V ns
Maximum Turn-on Time
6.7(Typ)@1.95V ns
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G53DP-G
74LVC2G53DP-G
935280383125
74LVC2G53DP-G
935280383125
NXP Semiconductors
Fig 28. Package outline SOT902-1 (XQFN8U)
74LVC2G53
Product data sheet
XQFN8U: plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
SOT902-1
VERSION
OUTLINE
not for soldering
metal area
max
0.5
A
terminal 1
index area
terminal 1
index area
0.05
0.00
A
L
1
1
3
2
1
0.25
0.15
b
IEC
- - -
L
1.65
1.55
D
e
1.65
1.55
E
4
8
D
0.55
MO-255
JEDEC
e
0
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
0.5
e
1
Rev. 6 — 27 September 2010
0.35
0.25
L
5
6
7
B
b
0.15
0.05
JEITA
L
- - -
1
e
e
A
E
scale
1
1
1
∅ v
∅ w
0.1
v
M
M
C
C
0.05
w
A
2-channel analog multiplexer/demultiplexer
B
0.05
y
A
2 mm
0.05
y
A
y
1
1
1
C
PROJECTION
EUROPEAN
detail X
74LVC2G53
X
C
© NXP B.V. 2010. All rights reserved.
y
ISSUE DATE
05-11-25
07-11-14
SOT902-1
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