NX3L1T3157GW,125 NXP Semiconductors, NX3L1T3157GW,125 Datasheet
NX3L1T3157GW,125
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NX3L1T3157GW-G
NX3L1T3157GW-G
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NX3L1T3157GW,125 Summary of contents
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NX3L1T3157 Low-ohmic single-pole double-throw analog switch Rev. 07 — 21 January 2010 1. General description The NX3L1T3157 is a low-ohmic single-pole double-throw analog switch suitable for use as an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input ...
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... NXP Semiconductors 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C NX3L1T3157GW −40 °C to +125 °C NX3L1T3157GM 5. Marking [1] Table 2. Marking codes Type number NX3L1T3157GW NX3L1T3157GM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning NX3L1T3157 1 Y1 GND 001aai329 Fig 3. Pin configuration SOT363 (SC-88) 7.2 Pin description Table 3. Pin description Symbol Pin Y1 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. NX3L1T3157_7 Product data sheet ...
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... NXP Semiconductors 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW I input clamping current IK I switch clamping current SK I switch current ...
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... NXP Semiconductors 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage select input S; I current V = GND to 4.3 V ...
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... NXP Semiconductors 11.1 Test circuits V − Fig 5. Test circuit for measuring OFF-state leakage current − Fig 6. Test circuit for measuring ON-state leakage current NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch switch GND − GND − 0 0.3 V. ...
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... NXP Semiconductors 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Symbol Parameter Conditions R ON resistance V = GND to V ON(peak) I (peak ΔR ON resistance V = GND mismatch I SW between V channels resistance V = GND to V ON(flat) I (flatness [1] Typical values are measured at T ...
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... NXP Semiconductors 11.3 ON resistance test circuit and graphs GND Fig 7. Test circuit for measuring ON resistance NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch R switch switch I SW 001aag563 Fig 8. Rev. 07 — 21 January 2010 NX3L1T3157 1.6 ON (Ω) 1.2 (1) 0.8 (2) (3) (4) 0 1.5 V. ...
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... NXP Semiconductors 1 (Ω) 1.2 0.8 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 9. ON resistance as a function of input voltage 1 1 (Ω) 0.8 0.6 0.4 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = − ...
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... NXP Semiconductors 1 (Ω) 0.8 0.6 0.4 0 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 13. ON resistance as a function of input voltage 3 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see ...
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... NXP Semiconductors Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t break-before-make see b-m time [1] Typical values are measured at T [2] Break-before-make guaranteed by design. 12.1 Waveform and test circuits Y1 connected connected to V Measurement points are given in Logic level typical output voltage level that occurs with the output load ...
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... NXP Semiconductors a. Test circuit b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing G Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance External voltage for measuring switching times. EXT Fig 17. Load circuit for switching times Table 11 ...
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... NXP Semiconductors 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V ≤ specified 2.5 ns amb Symbol Parameter THD total harmonic distortion −3 dB frequency f (−3dB) response α isolation (OFF-state) iso V crosstalk voltage ct Q charge injection ...
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... NXP Semiconductors Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 19. Test circuit for measuring the frequency response when channel is in ON-state V Adjust f voltage to obtain 0 dBm level at input. i Fig 20. Test circuit for measuring isolation (OFF-state) NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch ...
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... NXP Semiconductors a. Test circuit b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch logic input 0.5V CC logic off on input ( Rev. 07 — 21 January 2010 NX3L1T3157 ...
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... NXP Semiconductors a. Test circuit b. Input and output pulse definitions = ΔV × C Definition: Q inj O L ΔV = output voltage variation generator resistance. gen V = generator voltage. gen Fig 22. Test circuit for measuring charge injection NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch V CC ...
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... NXP Semiconductors 13. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.20 0.8 0.10 OUTLINE VERSION IEC SOT363 Fig 23. Package outline SOT363 (SC-88) NX3L1T3157_7 Product data sheet Low-ohmic single-pole double-throw analog switch ...
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... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...
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... NXP Semiconductors 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant 15. Revision history Table 14. Revision history Document ID Release date NX3L1T3157_7 20100121 • Modifications: Section • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics 11.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 11 ...