AT32UC3C2512C-Z2ZR Atmel, AT32UC3C2512C-Z2ZR Datasheet - Page 46
AT32UC3C2512C-Z2ZR
Manufacturer Part Number
AT32UC3C2512C-Z2ZR
Description
Microcontrollers (MCU) 512KB FL,-40/125oC AUTO
Manufacturer
Atmel
Datasheet
1.AT32UC3C1512C-AZR.pdf
(106 pages)
Specifications of AT32UC3C2512C-Z2ZR
Lead Free Status / Rohs Status
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6.1.3.2
9166BS–AVR-02/11
3.3V Single Supply Mode
Figure 6-1 on page 46
I/O lines and analog blocks will be powered by the same power (VDDIN_5 = VDDIO1 = VDDIO2
= VDDIO3 = VDDANA).
Figure 6-1.
In 3.3V single supply mode, the VDDIN_5 and VDDIN_33 pins should be connected together
externally. The 1.8V internal regulator is connected to the 3.3 V source (VDDIN_5 pin) and its
output feeds VDDCORE.
The 3.3V regulator should be disabled once the circuit is running through the VREG33CTL field
of the VREGCTRL SCIF register.
Figure 6-2 on page 47
I/O lines and analog blocks will be powered by the same power (VDDIN_5 = VDDIN_33 =
VDDIO1 = VDDIO2 = VDDIO3 = VDDANA).
C
IN2
C
C
OUT2
OUT2
GNDCORE
VDDCORE
VDDIN_33
C
IN1
5V Single Power Supply mode
5.5V
C
C
4.5-
OUT1
OUT1
+
-
shows the power schematics to be used for 3.3V single supply mode. All
shows the power schematics to be used for 5V single supply mode. All
VDDIO1
VDDIO2
VDDIO3
BOD33
BOD18
BOD50
POR
3.3V
1.8V
Reg
Reg
VDDIN_5
VDDANA
Analog: ADC, AC, DAC, ...
SCIF, BOD,
Peripherals
Memories
RCSYS
CPU
PLL
GNDANA
AT32UC3C
GNDPLL
GNDIO1
GNDIO2
GNDIO3
46
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