ADC1112D125F2/DB,598 NXP Semiconductors, ADC1112D125F2/DB,598 Datasheet - Page 25

• Manufacturer Part Number: ADC1112D125F2/DB,598
• Description: BOARD EVALUATION FOR ADC1112D125
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of ADC1112D125F2/DB,598

• Design Resources: ADC1x12D Demo Brd PCB Files
• Number Of Adc's: 2
• Number Of Bits: 11
• Sampling Rate (per Second): 125M
• Data Interface: Serial, LVDS/DDR
• Input Range: 1 ~ 2 Vpp
• Power (typ) @ Conditions: 1.23W @ 125MSPS
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC1112D125
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6891

4. Appendix A.1: coherency calculation
QS_ADC1412D_10.doc
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The coherency relies on the fact that clock and analog input signal are synchronized and
the first and last samples being captured are adjoining samples: it ensures a continuous
digitized time process for the FFT processing.
To achieve this, one has to follow the equation:
where M is an odd integer equal to the number of periods being acquired and N the
number of samples acquired.
With Fin, Fs and N known, M has to be chosen such that it follows the equation above.
To do this iterative calculation, one has to decide whether Fin or Fs is fixed.
To illustrate this process, let’s consider our current example with Fin = 170 MHz, Fs =
125 Msps and N = 16384 samples acquired:
Those values needs to be programmed in the signal generator and clock generator
before capture is done, otherwise the FFT calculation will lead to a non-coherent result
as shown below:
The numbers given for SNR, SFDR are completely wrong if coherency is not respected.
Fig 21. SW_ADC_1_r02: “Acquisition” page, non-coherent capture example
if Fin is fixed, this leads to M = 36863 periods of input signal to be acquired and a
real sampling frequency to be Fs = 124.995737 MHz;
if Fs is fixed, this leads to M = 36863 periods of input signal to be acquired and a real
input frequency to be Fin = 170.005798 MHz.
Rev. 10 — 17 December 2010
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