S29GL256S10DHI010 Spansion Inc., S29GL256S10DHI010 Datasheet - Page 47
S29GL256S10DHI010
Manufacturer Part Number
S29GL256S10DHI010
Description
Manufacturer
Spansion Inc.
Datasheet
1.S29GL256S10DHI010.pdf
(97 pages)
Specifications of S29GL256S10DHI010
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5.6
February 11, 2011 S29GL_128S_01GS_00_01
Embedded Algorithm Performance Table
Notes:
1. Not 100% tested.
2. Typical program and erase times assume the following conditions: 25°C, 3.0V V
3. Under worst case conditions of 90°C, V
4. Effective write buffer specification is based upon a 512-byte write buffer operation
5. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 0000h before Sector and Chip erasure.
6. System-level overhead is the time required to execute the bus-cycle sequence for the program command. See
Sector Erase Time 128 kbyte
Single Word Programming Time
Buffer Programming Time
Sector Programming Time 128 kB (full Buffer
Programming)
Erase Suspend/Erase Resume (t
Program Suspend/Program Resume (t
Erase Resume to next Erase Suspend (t
Program Resume to next Program Suspend (t
Blank Check
NOP (Number of Program-operations, per Line)
Definitions on page 57
D a t a
–
Write Buffer Abort Reset command
Status Register Clear command
Parameter
Reads the status register and returns to WBA busy state
S h e e t
for further information on command definitions.
( A d v a n c e
(Note 1)
ESL
)
2-byte
32-byte
64-byte
128-byte
256-byte
512-byte
Table 5.6 Embedded Algorithm Characteristics
PSL
ERS
)
CC
GL-S MirrorBit
)
(Note 1)
= 2.70V, 100,000 cycles, and a random data pattern.
(Note 1)
(Note 1)
PRS
(Note 1)
(Note 1)
)
I n f o r m a t i o n )
Typ
®
Family
(Note 2)
200
150
150
180
200
240
320
420
108
100
100
6.2
Max
1100
400
750
192
256
(Note 3)
8.5
CC
40
40
, 10,000 cycle, and a random data pattern.
Unit
ms
ms
ms
µs
µs
µs
µs
µs
µs
Includes pre-programming prior
to erasure
(Note 6)
Minimum of 60 ns but ≥ typical
periods are needed for Erase to
progress to completion.
Minimum of 60 ns but ≥ typical
periods are needed for Program
to progress to completion.
Table 6.1, Command
Comments
(Note 5)
47
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