MRF89XAT-I/MQ Microchip Technology, MRF89XAT-I/MQ Datasheet - Page 54

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MRF89XAT-I/MQ

Manufacturer Part Number
MRF89XAT-I/MQ
Description
RF ISM BAND TXRX 32 QFN
Manufacturer
Microchip Technology
Series
-r
Datasheet

Specifications of MRF89XAT-I/MQ

Frequency
863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
Data Rate - Maximum
200 kbps
Modulation Or Protocol
FSK, OOK
Applications
ISM
Power - Output
12.5dBm
Sensitivity
-113dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
3mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Memory Size
*
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Rf Ic Case Style
QFN
No. Of Pins
32
Svhc
No SVHC (20-Jun-2011)
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MRF89XAT-I/MQTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF89XAT-I/MQ
Manufacturer:
MICROCHIP
Quantity:
12 000
2.20
2.20.1
REGISTER 2-29:
2.20.2
REGISTER 2-30:
DS70622B-page 54
MRF89XA
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7
bit 6-0
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7-0
MCHSTREN
R/W-0
R/W-0
Packet Configuration Registers
PAYLOAD CONFIGURATION
REGISTER DETAILS
NODE ADDRESS SET REGISTER
DETAILS
MCHSTREN: Manchester Encoding/Decoding Enable bit
1 = Enabled
0 = Disabled (default)
PLDPLEN<6:0>: Payload Packet Length bits
These bits indicate payload packet length. If Pkt_format = 0, payload length. If Pkt_format = 1, max
length in RX, not used in TX.
PLDPLEN<6:0> = 000000 (default)
NLADDR<7:0>: Node Local Address bits
These bits are to be set to configure the Node Local Address for filtering of received packets.
NLADDR<7:0> = 00h (default)
R/W-0
R/W-0
PLOADREG: PAYLOAD CONFIGURATION REGISTER
(ADDRESS:0x1C) (POR:0x00)
NADDSREG: NODE ADDRESS SET REGISTER (ADDRESS:0x1D) (POR:0x00)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
NLADDR<7:0>
PLDPLEN<6:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
© 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 0
bit 0

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