EVAL-ADF7023-JDB1Z Analog Devices Inc, EVAL-ADF7023-JDB1Z Datasheet - Page 66

• Manufacturer Part Number: EVAL-ADF7023-JDB1Z
• Description: BOARD EVAL ADF7023-JDB1Z
• Manufacturer: Analog Devices Inc
• Series: -r
• Type: Transceiverr

Specifications of EVAL-ADF7023-JDB1Z

• Frequency: 902MHz ~ 958MHz
• Kit Application Type: Wireless Connectivity
• Application Sub Type: RF Transceiver
• Features: Operating At RF Band 902MHz To 958MHz, PC Interface And Control
• Silicon Manufacturer: Analog Devices
• Silicon Core Number: ADF7023
• Kit Contents: Board, Manual
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ADF7023

ADF7023-J
RF OUTPUT STAGE
Power Amplifier (PA)
The ADF7023-J PA can be configured for single-ended or
differential output operation using the PA_SINGLE_DIFF_SEL
bit in the RADIO_CFG_8 register (Address 0x114). The PA level
is set by the PA_LEVEL bit in the RADIO_CFG_8 register and
has a range of 0 to 15. For finer control of the output power
level, the PA_LEVEL_MCR register (Address 0x307) can be
used. It offers more resolution with a setting range of 0 to 63.
The relationship between the PA_LEVEL and PA_LEVEL_MCR
settings is given by
The single-ended configuration can deliver 13.5 dBm output
power. The differential PA can deliver 10 dBm output power
and allows a straightforward interface to dipole antennae. The
two PA configurations offer a Tx antenna diversity capability.
Note that the two PAs cannot be enabled at the same time.
Automatic PA Ramp
The ADF7023-J has built-in up and down PA ramping for both
single-ended and differential PAs. There are eight ramp rate
settings, with the ramp rate defined as a certain number of PA
power level settings per data bit period. The PA_RAMP
variable in the RADIO_CFG_8 register (Address 0x114)
sets this PA ramp rate, as illustrated in Figure 79.
The PA ramps to the level set by the PA_LEVEL or PA_LEVEL_
MCR settings. Enabling the PA ramp reduces spectral splatter
and helps meet radio regulations, which limit PA transient
spurious emissions. To ensure optimum performance, an
adequately long PA ramp rate is required based on the data rate
and the PA output power setting. The PA_RAMP setting should,
therefore, be set such that
where PA_LEVEL_MCR is related to the PA_LEVEL setting by
PA_LEVEL_MCR = 4 × PA_LEVEL + 3.
(256 CODES PER BIT)
(128 CODES PER BIT)
(64 CODES PER BIT)
(32 CODES PER BIT)
(16 CODES PER BIT)
PA_LEVEL_MCR = 4 × PA_LEVEL + 3
Ramp Rate (Codes/Bit) < 2500 ×
(8 CODES PER BIT)
(4 CODES PER BIT)
Figure 79. PA Ramp for Different PA_RAMP Settings
PA RAMP 1
PA RAMP 2
PA RAMP 3
PA RAMP 4
PA RAMP 5
PA RAMP 6
PA RAMP 7
DATA BITS
1
2
3
4
PA_LEVEL_M
...
DATA_RATE
8
...
16
CR
[
11
[
: 5
:
] 0
] 0
Rev. 0 | Page 66 of 100
PA/LNA INTERFACE
The ADF7023-J supports both single-ended and differential PA
outputs. Only one PA can be active at a time. The differential
PA and LNA share the same pins, RFIO_1P and RFIO_1N,
which facilitate a simpler antenna interface. The single-ended
PA output is available on the RFO2 pin. A number of PA/LNA
antenna matching options are possible and are described in the
PA/LNA Matching section.
RECEIVE CHANNEL FILTER
The channel filter of the receiver is a fourth-order, active polyphase
Butterworth filter with programmable bandwidths of 100 kHz,
150 kHz, 200 kHz, and 300 kHz. The fourth-order filter gives very
good interference suppression of adjacent and neighboring channels
and also suppresses the image channel by approximately 36 dB at a
100 kHz IF bandwidth and an RF frequency of 915 MHz.
For channel bandwidths of 100 kHz to 200 kHz, an IF frequency
of 200 kHz is used, which results in an image frequency located
400 kHz below the wanted RF frequency. When the 300 kHz
bandwidth is selected, an IF frequency of 300 kHz is used, and
the image frequency is located at 600 kHz below the wanted
frequency.
The bandwidth and center frequency of the IF filter are calibrated
automatically after entering the PHY_ON state if the BB_CAL
bit is set in the MODE_CONTROL register (Address 0x11A).
The filter calibration time takes 100 μs.
The IF bandwidth is programmed by setting the IFBW field in
the RADIO_CFG_9 register (Address 0x115). The filter’s pass
band is centered at an IF frequency of 200 kHz when bandwidths
of 100 kHz to 200 kHz are used and centered at 300 kHz when
an IF bandwidth of 300 kHz is used.
IMAGE CHANNEL REJECTION
The ADF7023-J is capable of providing improved receiver image
rejection performance by the use of a fully integrated image
rejection calibration system under the control of the on-chip
communications processor. To operate the calibration system, a
firmware module is downloaded to the on-chip program RAM.
The firmware download is supplied by Analog Devices and
described in the Downloadable Firmware Modules section.
AUTOMATIC GAIN CONTROL (AGC)
AGC is enabled by default and keeps the receiver gain at the
correct level by selecting the LNA, mixer, and filter gain settings
based on the measured RSSI level. The LNA has three gain levels,
the mixer has two gain levels, and the filter has three gain levels.
In all, there are six AGC stages, which are defined in Table 33.
Table 33. AGC Gain Modes
Gain Mode
1
2
3
4
5
6
LNA Gain
High
High
Medium
Low
Low
Low
Mixer Gain
High
Low
Low
Low
Low
Low
Filter Gain
High
High
Medium
Low
High
High