ATA557001C-DDB Atmel, ATA557001C-DDB Datasheet - Page 14

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ATA557001C-DDB

Manufacturer Part Number
ATA557001C-DDB
Description
IC IDIC SENSOR RW 1KBIT DIE
Manufacturer
Atmel
Series
-r
Datasheet

Specifications of ATA557001C-DDB

Function
Read/Write
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
4.11
5. Error Handling
5.1
5.2
14
Programming
Errors During Writing
Errors Before/During Programming
Atmel ATA5570C
When all necessary information has been received by the Atmel
may proceed. There is a clock delay between the end of the writing sequence and the start of
programming.
Typical programming time is 5.6ms. This cycle includes a data verification read to grant secure
and correct programming. After programming is successfully executed, the Atmel ATA5570C
enters block-read mode transmitting the block just programmed
Note:
Several error conditions can be detected to ensure that only valid bits are programmed into
the EEPROM. There are two error types, which lead to two different actions.
The following detectable errors could occur during writing data to the Atmel ATA5570C:
Valid bit counts accepted by the Atmel ATA5570C are:
Password write
Standard write
AOR wake up
Direct access with PWD
Direct access
Reset command
Page 0/1 regular-read
If any of these erroneous conditions are detected, the Atmel ATA5570C enters regular-read
mode, starting with block 1 of the page defined in the command sequence.
If the command sequence was received successfully, the following error could still prevent
programming:
In case of a locked block, programming mode will not be entered. The Atmel ATA5570C
reverts to block-read mode, continuously transmitting the currently addressed block.
• Wrong number of field clocks between two gaps (i.e., not a valid “1” or “0” pulse stream)
• Password mode is activated and the password does not match the contents of block 7
• The number of bits received in the command sequence is incorrect
• The lock bit of the addressed block is already set
This timing and behavior is different from the e555x-family predecessors.
70 bits
38 bits
38 bits
34 bits
6 bits
2 bits
2 bits
(PWD = 1)
(PWD = 0)
(PWD = 1)
(PWD = 1)
(PWD = 0)
(Figure 4-8 on page
®
ATA5570C, programming
9191B–RFID–05/11
12).

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