PEB20256EV21GXP Infineon Technologies, PEB20256EV21GXP Datasheet - Page 191
PEB20256EV21GXP
Manufacturer Part Number
PEB20256EV21GXP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB20256EV21GXP.pdf
(232 pages)
Specifications of PEB20256EV21GXP
Operating Supply Voltage (typ)
2.5/3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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GISTA/GIACK
Interrupt Status/Interrupt Acknowledge Register
Access
Address
Reset Value
Depending on the corresponding bits in register GMASK, an interrupt indication in this
register will be flagged at pin INTA. If an interrupt bit is masked (set to ’1’) in register
GMASK, system software has to poll this register in order to get status information of the
disabled interrupt bit.
INTOF
LBI
Data Sheet
INTOF
31
15
0
0
0
0
0
: read/write
: 0F0
: 00000000
Interrupt Overflow
This bit indicates that interrupt information has been lost due to overload
conditions of the internal interrupt controller. This interrupt indicates a
severe system problem. If this bit is set and INTOF is not masked in
register GMASK, the interrupt pin INTA will be asserted. INTOF is
cleared, when an ’1’ is written to this bit.
0
1
Local Bus Interrupt
The MUNICH256 supports bridging of interrupts from the local bus to the
PCI bus. In this application the pin LINT is used as an input and as soon
0
0
H
No interrupt overflow.
Interrupt overflow. The interrupt will be cleared by writing a ‘1’ to
the corresponding bit.
0
0
H
0
0
0
0
Q8
0
8
191
Q7
0
7
Q6
0
6
Q5
0
5
Q4
0
4
Register Description
Q3
0
3
Q2
PEB 20256 E
PEF 20256 E
0
2
LBI
Q1
17
1
04.2001
Q0
16
IF
0
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