KIT_TC1793_SK Infineon Technologies, KIT_TC1793_SK Datasheet - Page 23

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KIT_TC1793_SK

Manufacturer Part Number
KIT_TC1793_SK
Description
KIT STARTER AUDO MAX TC1793
Manufacturer
Infineon Technologies
Series
AUDOMAXr
Type
MCUr
Datasheets

Specifications of KIT_TC1793_SK

Contents
Board, Adapters, Cables, CD, Power Supply
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
TC1793
Other names
KITTC1793SKIN
TriCore™ TC1.6
The architecture also supports fast context switching.
The Peripheral Control Processor (PCP2) is a programmable, single cycle, 32-bit processing
The General Purpose Timer Array (GPTA) delivers extremely flexible filtering and high
signals. It enables all types of enhanced counting, capture compare and PWM function-
Real-time responsiveness is largely determined by interrupt latency and context switch
time. The high-performance architecture minimizes interrupt latency by avoiding long
multi-cycle instructions and providing a flexible hardware-supported interrupt scheme.
unit with its own code and data memory unit (Harvard architecture). It is used as an inter-
rupt service provider, delivering hardware interrupt priority arbitration with 255 priority
levels. Instead of static implementation, the PCP provides programmable improved
peripheral intelligence.
resolution signal acquisition as well as a digital PLL to generate higher resolution input
ality thanks to its universal cell structure.
Features
64-bit data width (shared resource
16x32 MACs
Up to 300MHz
Six-stage pipeline
Dedicated integer division unit in
hardware
Optimized Floating Point Unit (FPU)
Enhanced branch prediction (branch
history and target buffers)
Optimized crossbar interconnect with
interconnect)
16-bit and 32-bit instruction formats
32-bit load-store Harvard architecture
Superscalar execution
Sustained throughput by dual
SIMD (Single Instruction Multiple Data)
packed arithmetic
Zero overhead loops (loop recognition
buffer)
DSP addressing modes and saturated
math
Benefits
Highest performance for complex
engine management systems
Integrated MCU-DSP instructions in one
core
Very fast context switching for interrupt
driven system
Fast and efficient processing of multiple
tasks on one engine
Low code size and inherent high level
language support
One development toolset for both MCU
and DSP tasks
Higher flexibility and lower cost
Support and supply of complete system
chipset
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