DC1386B Linear Technology, DC1386B Datasheet - Page 7

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DC1386B

Manufacturer Part Number
DC1386B
Description
BOARD DEMO LTM8032
Manufacturer
Linear Technology
Series
µModuler
Datasheets

Specifications of DC1386B

Design Resources
LTM8032 Spice Model DC1386B Design Files DC1386B Schematic LTM8032 Gerber Files
Main Purpose
DC/DC, Step Down
Outputs And Type
1, Non-Isolated
Power - Output
-
Voltage - Output
3.3V
Current - Output
2A
Voltage - Input
5.5 ~ 36 V
Regulator Topology
Buck
Frequency - Switching
600kHz
Board Type
Fully Populated
Utilized Ic / Part
LTM8032EV
Lead Free Status / Rohs Status
Not applicable / Not applicable
PIN FUNCTIONS
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin fl oating. Tie to a clock source for synchronization.
Clock edges should have rise and fall times faster than 1μs.
See synchronizing section in Applications Information.
PGOOD (Pin K7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low until
the ADJ pin is within 10% of the fi nal regulation voltage.
The PGOOD output is valid when V
RUN/SS is high. If this function is not used, leave this
pin fl oating.
BLOCK DIAGRAM
FIN
V
GND
SHARE
IN
EMI FILTER
RUN/SS
IN
is above 3.6V and
SYNC
CONTROLLER
CURRENT
®
MODE
operation
RT
ADJ (Pin J7): The LTM8032 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
where R
Burst Mode is a registered trademark of Linear Technology Corporation.
PGOOD
R
ADJ
ADJ
=
ADJ
V
OUT
is in kΩ.
196 71
is given by the equation:
– .
4.7μH
.
0 79
ADJ
249k
10μF
V
BIAS
GND
AUX
OUT
LTM8032
8032 BD
8032fc
7

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