ZPSD303B-90JI STMicroelectronics, ZPSD303B-90JI Datasheet - Page 7

• Manufacturer Part Number: ZPSD303B-90JI
• Description: IC MCU PROG 1MB 5V 90NS 44-PLCC
• Manufacturer: STMicroelectronics

Specifications of ZPSD303B-90JI

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 44-PLCC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3701

3.0
Key Features
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PSD3XX Family
Single-chip programmable peripheral for microcontroller-based applications
256K to 1 Mbit of UV EPROM with the following features:
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Optional 16 Kbit SRAM is configurable as 2K x 8 or 1K x 16. The access time can be
as quick as 70 ns, including address decoding.
19 I/O pins that can be individually configured for :
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Two Programmable Arrays (PAD A and PAD B) replace your PLD or decoder, and have
the following features:
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Microcontroller logic that eliminates the need for external “glue logic” has the following
features:
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Optional built-in page logic expands the MCU address space by up to 16 times
Programmable power management with standby current as low as 1µA for low-voltage
version
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Track Mode that allows other microcontrollers or host processors to share access to the
local data bus
Built-in security locks the device and PAD decoding configuration
Wide Operating Voltage Range
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Available in a variety of packaging (44-pin PLDCC, CLDCC, TQFP, and PQFP)
Simple, menu-driven software (PSDsoft) allows configuration and design entry on a PC.
Configurable as 32, 64, or 128 K x 8; or as 16, 32, or 64 K x 16
Divided into eight equally-sized mappable blocks for optimized address mapping
As fast as 70 ns access time, which includes address decoding
Microcontroller I/O port expansion
Programmable Address decoder (PAD) I/O
Latched address output
Open-drain or CMOS output
Up to 18 Inputs and 24 outputs
40 Product terms (13 for PAD A and 27 for PAD B)
Ability to decode up to 1 MB of address without paging
Ability to interface to multiplexed and non-multiplexed buses
Built-in address latches for multiplexed address/data bus
ALE and Reset polarity are programmable (Reset polarity not programmable on
V-versions)
Multiple configurations are possible for interface to many different microcontrollers
CMiser bit —programmable option to reduce AC power consumption in memory
Turbo Bit (ZPSD only)—programmable bit to reduce AC and DC power consumption
in the PADs.
V-versions: 2.7 to 5.5 volts
Others: 4.5 to 5.5 volts