DS33M33N+ Maxim Integrated Products, DS33M33N+ Datasheet - Page 19

IC MAPPER ETHERNET 256CSBGA

DS33M33N+

Manufacturer Part Number
DS33M33N+
Description
IC MAPPER ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33M33N+

Applications
Data Transport
Interface
SPI
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Rev: 111908
___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET
ITU-T
G.703 11/01
G.704 10/98
G.707/Y.1322
G.751 11/88
G.752 11/88
G.775 11/94
G.783 02/04
G.823 03/00
G.824 03/00
G.825 03/00
G.832 10/98
G.7041/Y.1303
G.7042/Y.1305
G.7043/Y.1343
G.8040/Y.1340
O.150 05/96
O.151 10/92
O.161 11/88
O.162 10/92
O.171 04/97
O.172 03/01
O.181 05/02
Q.921
Y.1731
X.86/Y.1323
Telcordia
GR-253-CORE
GR-499-CORE
GR-820-CORE
IEEE
802.3-2005
802.1D-2004
802.1Q-2005
802.1v-2001
802.1ag
IEEE Std 1149-
1990
Other
SPECIFICATION
Physical/Electrical Characteristics of Hierarchical Digital Interfaces
Synchronous Frame Structures Used at 1544, 6312, 2048, 8488 and 44 736 Kbit/s
Hierarchical Levels
Network node interface for the synchronous digital hierarchy (SDH) (10/2000)
Digital Multiplex Equipment Operating at the Third Order Bit Rate of 34,368 Kbit/s and the
Fourth Order bit Rate of 139,264 Kbit/s and Using Positive Justification
Characteristics Of Digital Multiplex Equipments Based On A Second Order Bit Rate Of 6312
Kbit/s And Using Positive Justification
Loss Of Signal (LOS) and Alarm Indication Signal (AIS) Defect Detection and Clearance
Criteria
Characteristics of synchronous digital hierarchy (SDH) equipment functional blocks
The Control of Jitter and Wander Within Digital Networks Which are Based on the 2048
Kbit/s Hierarchy
The Control of Jitter and Wander Within Digital Networks Which Are Based On The 1544
Kbit/s Hierarchy
The Control of Jitter and Wander Within Digital Networks Which Are Based On The
Synchronous Digital Hierarchy (SDH)
Transport of SDH Elements on PDH Networks – Frame and Multiplexing Structures
Generic Framing Procedure (GFP) (08/2005)
Link Capacity Adjustment Scheme (LCAS) for Virtual Concatenated signal (03/2006)
Virtual Concatenation of PDH signals (07/2004)
GFP Frame Mapping into PDH (09/2005)
General Requirements for Instrumentation for Performance Measurements on Digital
Transmission Equipment
Error Performance Measuring Equipment Operating at the Primary Rate and Above
In-Service Code Violation Monitors for Digital Systems
Equipment To Perform In-Service Monitoring on 2048, 8448, 34,368 and 139,264 Kbit/s
Signals
Timing Jitter And Wander Measuring Equipment For Digital Systems Which Are Based On
The Plesiochronous Digital Hierarchy (PDH)
Timing Jitter And Wander Measuring Equipment For Digital Systems Which Are Based On
The Synchronous Digital Hierarchy (SDH)
Equipment to assess error performance on STM-N interfaces
ISDN User-Network Interface – Data Link Layer Specification (09/1997)
Y.1731 Ethernet OAM (05/2006)
Ethernet over LAPS (02/2001)
Synchronous Optical Network (SONET) Transport Systems: Common Generic Criteria, Issue
3, September 2000
Transport Systems Generic Requirements (TSGR): Common Requirements, Issue 2,
December 1998
Generic Digital Transmission Surveillance, Issue 1, November 1994
CSMA/CD access method and physical layer specifications.
MAC Bridge
Virtual LANs
VLAN Classification by Protocol and port
Ethernet OAM (extract/insert support) (draft 8.1)
IEEE Standard Test Access Port and Boundary-Scan Architecture, (Includes IEEE Std 1149-
1993E) October 21, 1993
RMII: Industry Implementation Agreement for “Reduced MII Interface”, Sept 1997
SPECIFICATION TITLE
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