NCV8881PWR2G ON Semiconductor, NCV8881PWR2G Datasheet - Page 31

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NCV8881PWR2G

Manufacturer Part Number
NCV8881PWR2G
Description
IC SMPS WITH WATCHDOG 16SOIC
Manufacturer
ON Semiconductor
Series
-r
Datasheet

Specifications of NCV8881PWR2G

Topology
Step-Down (Buck) (1), Linear (LDO) (2)
Function
Automotive
Number Of Outputs
3
Frequency - Switching
170kHz
Voltage/current - Output 1
3.3 V ~ 8 V, 1.5A
Voltage/current - Output 2
5V, 100mA
Voltage/current - Output 3
8.5V, 40mA
W/led Driver
No
W/supervisor
No
W/sequencer
No
Voltage - Supply
5 V ~ 19 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.295", 7.50mm Width) Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCV8881PWR2G
Manufacturer:
ON Semiconductor
Quantity:
800
Part Number:
NCV8881PWR2G
Manufacturer:
ON/安森美
Quantity:
20 000
Where D is the Duty Cycle = t
forward voltage of the freewheeling diode.
is the ability to supply enough input charge to satisfy sudden
increases in output current (such as produced at start−up, or
upon maximum load step) without an unacceptable drop in
input voltage. This is sometimes important when the input
amplifier and the impedance networks Z
and Z
provide a loop transfer function with the highest 0 dB
crossing frequency to have fast response and the highest gain
Another consideration for the value of the input capacitor
The compensation network consists of the internal error
FB
(R2, C1 and C2). The compensation network has to
I
IN(RMS)
+ D
( 1 * D )
ON
/(t
ON
VOLTAGE
RAMP
I
+t
SWOUT
IN
OFF
COMP
(R1, R3 and C3)
), and V
)
R2
F
http://onsemi.com
ERROR
AMP
C1
is the
( 1 * D )
Figure 58.
C2
VIN
31
POWER
SWITCH
2
VREF
voltage initially rises past the Undervoltage Lockout
threshold.
SMPS Compensation
loop regulates V
power switch duty cycle. Inherent with all voltage−mode
control loops is a compensation network.
in DC conditions to minimize the load regulation. The
open-loop gain magnitude versus frequency plot of a stable
control loop crosses zero dB with close to −20 dB/decade
slope and a phase margin greater than 45
I
DFW
SWOUT
The NCV8855 utilizes voltage mode control. The control
C3
LOUT
R1
2
R3
DCR
)
( 1 * D )
SWOUT
VOUT
COUT
ESR
by monitoring it and controlling the
T
SW
12
V
SWOUT
L
)V
°
.
F
2
(eq. 7)

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