NCV3030ADR2G ON Semiconductor, NCV3030ADR2G Datasheet - Page 19
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NCV3030ADR2G
Manufacturer Part Number
NCV3030ADR2G
Description
IC PWM CTLR BUCK SYNC 8SOIC
Manufacturer
ON Semiconductor
Series
-r
Datasheet
1.NCP3030ADR2G.pdf
(23 pages)
Specifications of NCV3030ADR2G
Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1.44MHz
Duty Cycle
84%
Voltage - Supply
4.7 V ~ 28 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
and:
by both the control and synchronous MOSFET but are
dissipated only in the control MOSFET.
body diode in the synchronous MOSFET is shown as
follows:
volts so switching losses are negligible. Its power
dissipation only consists of conduction loss due to R
and body diode loss during the non−overlap periods.
MOSFET is described as follows:
where:
The body diode losses can be approximated as:
I
Vth
RMS_SYNC
P
where:
Next, the MOSFET output capacitance losses are caused
Finally the loss due to the reverse recovery time of the
The low−side or synchronous MOSFET turns on into zero
Conduction loss in the low−side or synchronous
BODY
t
t
ON
OFF
Figure 32. MOSFET Switching Characteristics
+
+
+ V
P
Q
I
Q
COND
G1
+ I
I
GD
G2
GD
P
FD
D_SYNC
P
OUT
+
@ I
+
DS
+ I
P
OUT
RR
V
@
+ 1
V
BST
BST
RMS_SYNC
+ Q
2
+ P
@ f
@ Q
* V
( 1 * D ) @ 1 )
SW
* V
RR
COND
OSS
@ NOL
TH
TH
@ V
Q
Q
@ V
2
GD
) P
IN
GD
@ R
R
R
IN
@ f
HSPU
LH
HSPD
BODY
DS(on)_SYNC
@ f
SW
) NOL
SW
) R
) R
ra
12
2
G
HL
G
(eq. 29)
(eq. 30)
(eq. 31)
(eq. 32)
(eq. 33)
(eq. 34)
(eq. 35)
(eq. 36)
http://onsemi.com
DS(on)
19
I
I
ƒ
1.2 MHz and NCP3030B is 2.4 MHz
V
7.5 V.
Q
MOSFET datasheet
V
region
Q
sheet
Q
synchronous MOSFET, specified in the datasheet
R
control, MOSFET
R
synchronous, MOSFET
NOL
HSDR turning on, typically 85 ns
NOL
LSDR turning on, typically 75 ns
the designer can calculate the required thermal impedance
for each device to maintain a specified junction temperature
at the worst case ambient temperature. The formula for
calculating the junction temperature with the package in free
air is:
T
T
P
R
MOSFET’s package
should be performed to insure the design will dissipate the
required power under worst case operating conditions.
Variables considered during testing should include
maximum ambient temperature, minimum airflow,
maximum input voltage, maximum loading, and component
variations (i.e. worst case MOSFET R
G1
G2
SW
A
D
J
DS(on)_CONTROL
DS(on)_SYNC
qJA
BST
GD
TH
OSS
RR
Once the MOSFET power dissipations are determined,
As with any power design, proper laboratory testing
: Junction Temperature
: Ambient Temperature
: Power Dissipation of the MOSFET under analysis
: output current from the high−side gate drive (HSDR)
: output current from the low−side gate drive (LSDR)
: switching frequency of the converter. NCP3030A is
: gate−to−source voltage at the gate charge plateau
: reverse recovery charge of the low−side or
: gate charge plateau region, commonly specified in the
: Thermal Resistance Junction−to−Ambient of the
LH
HL
: gate drive voltage for the high−side drive, typically
: MOSFET output gate charge specified in the data
: dead time between the LSDR turning off and the
: dead time between the HSDR turning off and the
: on resistance of the low−side, or
: on resistance of the high−side, or
T
J
+ T
A
) P
D
@ R
qJA
DS(on)
).