STEF05PUR STMicroelectronics, STEF05PUR Datasheet - Page 3
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STEF05PUR
Manufacturer Part Number
STEF05PUR
Description
IC LINEAR VOLTAGE REG 10VDFPN
Manufacturer
STMicroelectronics
Datasheet
1.STEF05PUR.pdf
(17 pages)
Specifications of STEF05PUR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11265-2
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STEF05
1
Figure 1.
PlN N°
1 to 5
10
11
6
7
8
9
Vout/Source
SYMBOL
En/Fault
Pin Configuration (Top View )
I-Limit
Pin Configuration
Table 1.
dv/dt
GND
Table 2.
Vcc
NC
STEF05
Type
Source
Source
Source
Source
Source
Connected to the Source of the internal power MOSFET and to the output terminal of the
fuse
Not connected
A resistor between this pin and the Source pin sets the overload and short circuit current
limit levels.
The enable/fault pin is a tri-state, bi-directional interface. During normal operation the pin
must be left floating, or it can be used to disable the output of the device by pulling it to
Ground using an open drain or open collector device.
If a thermal fault occurs, the voltage on this pin will go to an intermediate state to signal a
monitor circuit that the device is in thermal shutdown. It can be connected to another device
of this family to cause a simultaneous shutdown during thermal events.
The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. The internal
capacitor allows a ramp-up time of around 1ms. An external capacitor can be added to this
pin to increase the ramp time. If an additional capacitor is not required, this pin should be
left open.
Ground Pin
Exposed pad. Positive input voltage must be connected to Vcc.
Order Codes
Pin Description
Doc Number Rev 07
STEF05PUR
Tape & Reel
Vcc
NOTE
GND
dv/dt
En/fault
I-Limit
N/C
DFN 3x3 10L.
Package
Pin Configuration
3/17