Z8601720ASG Zilog, Z8601720ASG Datasheet - Page 15

• Manufacturer Part Number: Z8601720ASG
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z8601720ASG

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCMCIA Interface Overview
PCMCIA
Interface
PC_A[25:11]
Figure 1.
Power-On Reset
The ZX6017 defaults to the Memory Only interface as outlined in the
PCMCIA specification upon deassertion of Power-On Reset /POR). The
hardware sets Busy on the PC_RDY/BSY pin and then addresses the
EE_MASTER pin. If the EE_MASTER pin is unconnected or pulled
High, the ZX6017 serial interface defaults to the Master mode and an
external EEPROM is required. If this pin is pulled Low, the SLAVE mode
is selected and an external microprocessor is required to configure the
ZX6017 through the serial interface pins.
Next, the hardware addresses the PC_ATA//HOE pin. If the PC_ATA/
HOE pin is held Low for 40 clocks (PC_MCLK_IN) after POR
deassertion, the ZX6017 is enabled for ATA/IDE to ATA/IDE
PASSTHROUGH mode. The PASSTHROUGH mode is for systems that
Attribute Memory
Configuration
ZX6017 Functional Block Diagram
(256 Bytes)
Registers
Address
Decoder
PCMCIA
PCMCIA
Memory
and I/O
(16-Bit)
Z86017/Z16017 PCMCIA Interface Solution
Registers
Control
Peripheral Bus
Interface
Decoder
Window
(16-Bit)
Sequencer
EEPROM
Control
SPI
Reference Manual
RM001102-0901
Peripheral
Local Serial
ATA/IDE
EEPROM
Bus
SPI Port
or
µP
3