Z1601720ASG1868 Zilog, Z1601720ASG1868 Datasheet - Page 51

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Z1601720ASG1868

Manufacturer Part Number
Z1601720ASG1868
Description
IC PCMCIA INTERFACE 100-VQFP
Manufacturer
Zilog

Specifications of Z1601720ASG1868

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
100-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
Z1601720ASG1868
Manufacturer:
Zilog
Quantity:
10 000
Programming Internal Registers
Bit Placement
Bit 4
Bit 5
Bit 6
Bit 7
Table 11.
Bit Name
EN_RDY_BSY
EN_CTR_IRQ
EN_INT_POL
EN_ATA_BHE
Interface Configuration Register: Address 00h (Continued)
Z86017/Z16017 PCMCIA Interface Solution
Description
When this bit is set to 1, the PC_RDY/BSY/REQ/HINT
pin is configured as RDY//BSY. To con•gure this pin as an
IREQ/HINT, set this bit to 0. On Power-On Reset, the
ZX6017 automatically reads the EEPROM and also
determines if a PCMCIA device is connected. After the
entire attribute memory is loaded and the chip initialization
is complete, the READY/BSY signal on the PCMCIA bus
indicates READY. Without an EEPROM, the device
indicates READY whenever this bit is set and the ZX6017
has determined a PCMCIA bus is connected.
Enables PCMCIA Interrupt Mode. Enables ATA_IREQ pin
to control PC_IREQ in I/O Mode. This bit is active when
set to 1. On Power-On Reset, this bit is set to 0.
Enable local (M_PINT) processor interrupt polarity active
Low. This bit is active when set to 1. On Power-On Reset,
this bit is set to 0. Interrupt is active High. M_PINT is a tri-
state driven signal. Whenever an interrupt is present and
enabled, M_PINT is driven. If the interrupt is programmed
active High, then M_PINT is driven from tri-state to High.
If the interrupt polarity selects active Low interrupts, then
the interrupt is driven from tri-state to active Low. Also see
Register 2Ch.
When this bit is set to 1, it enables the ATA_PDIAG/
ATA_BHE/RING_IN pin to be used as a Byte High Enable
pin on a local interface side. Byte High Enable is used to
signify that a PCMCIA host is requesting or sending data
on the high byte bus pins ATA_DATA[15-8] of the local
bus. For ATA_BHE, also see Register 2Fh. When set to 0,
ATA_PDIAG/ATA_BHE/RING_IN is used as a local
bidirectional PDIAG pin. On Power-On Reset, this bit is
set to 0.
Product Specification
PS012002-1201
37

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