W83697UG Nuvoton Technology Corporation of America, W83697UG Datasheet - Page 35

• Manufacturer Part Number: W83697UG
• Description: IC LPC SUPER I/O 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697UG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant

CR60, CR61 (Default 0x03, 0x78 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
These two registers select Parallel Port I/O base address.
address is on 8 byte boundary).
CR70 (Default 0x07 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x03)
CRF0 (Default 0x3F)
6.7 Logical Device 2 (UART A)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR61 (Default 0x03, 0xF8 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
These two registers select Serial Port 1 I/O base address [0x100:0xFF8] on 8 byte boundary.
[0x100:0xFFC] on 4 byte boundary (EPP not supported) or
[0x100:0xFF8] on 8 byte boundary (all modes supported, EPP is only available when the base
Bit [7:4]: Reserved.
Bit [3:0]: These bits select IRQ resource for Parallel Port.
Bit [7:3]: Reserved.
Bit [2:0]: These bits select DRQ resource for Parallel Port.
Bit 7:
Bit [6:3]: ECP FIFO Threshold.
Bit [2:0]: Parallel Port Mode (CR28 PRTMODS2 = 0)
Bit [7:1]: Reserved.
Bit 0:
0x00=DMA0
0x01=DMA1
0x02=DMA2
0x03=DMA3
0x04 - 0x07= No DMA active
Reserved.
100 Printer Mode
000 Standard and Bi-direction (SPP) mode
001 EPP - 1.9 and SPP mode
101 EPP - 1.7 and SPP mode
010 ECP mode
011 ECP and EPP - 1.9 mode
111 ECP and EPP - 1.7 mode (Default)
1
0
Activates the logical device.
Logical device is inactive.
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W83697UF/W83697UG
Publication Release Date: May 26, 2005
Revision A1