PCA9560PW,112 NXP Semiconductors, PCA9560PW,112 Datasheet - Page 6

• Manufacturer Part Number: PCA9560PW,112
• Description: IC I2C EEPROM DIP SWITCH 20TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9560PW,112

• Applications: Networking
• Interface: Parallel/Serial
• Voltage - Supply: 3.135 V ~ 3.465 V
• Package / Case: 20-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3402-5; 935270330112; PCA9560PW

1. This table is valid when not overridden by I
Philips Semiconductors
CONVERSION FROM THE PCA9559 TO THE PCA9560
The PCA9560 is a drop in replacement to the PCA9559 with no software modifications. The PCA9559 has only one MUX_SELECT pin to
choose between the MUX_IN values and the single non-volatile register. Since the PCA9560 has two internal non-volatile registers, if Register 1
is left to all 0’s (default condition) then the MUX_SELECT_1 pin can function the same as the PCA9559 OVERRIDE # pin and MUX_SELECT_0
pin can function the same as the PCA9559 MUX_IN pin.
The PCA9560 can read the MUX_IN_X values via I
pins can be overridden by I
NON_MUXED_OUT output must stay the same and the MUX_SELECT pin functions should not be overridden by I
EXTERNAL CONTROL SIGNALS
The Write Protect (WP) input is used to control the ability to write the content of the non-volatile registers. If the WP signal is logic 0, the I
will be able to write the contents of the non-volatile registers. If the WP signal is logic 1, data will not be allowed to be written into the
non-volatile registers. In this case, the slave address and the command code will be acknowledged but the following data bytes will not be
acknowledged and the EEPROM is not updated.
The factory default for the contents of the non-volatile register are all logic 0. These stored values can be read or written using the I
(described in the next section).
The WP, MUX_IN*, MUX_SELECT_0, and MUX_SELECT_1 signals have internal pull-up resistors. See the DC and AC Characteristics for
hysteresis and signal spike suppression figures.
Function Table
NOTE:
POWER-ON RESET (POR)
When power is applied to V
reset condition is released and the PCA9560 volatile registers and I
The MUX_OUT and NON_MUXED_OUT pin values depend on:
2004 May 19
– the MUX_SELECT_0 and MUX_SELECT_1 logic levels, selecting either the MUX_IN input pins or one of the two 6-bit EEPROMs
– the previously stored values in the EEPROM registers/current MUX_IN pin values as shown in the Function Table
Dual 5-bit multiplexed 1-bit latched
I
2
C EEPROM DIP switch
WP
X
X
X
X
0
1
1
2
DD
C. To replace the PCA9559 with the PCA9560, the function table for the MUX_OUT outputs and the
, an internal power-on reset holds the PCA9560 in a reset state until V
MUX_SELECT_0
X
X
0
0
1
1
2
C control register.
2
C that the PACA9559 cannot do. Another difference is that the MUX_SELECT_X control
MUX_SELECT_1
2
X
X
1
0
1
0
C/SMBus state machine will initialize to their default states.
6
Write to the non-volatile registers through I
MUX_OUT from MUX_IN inputs and NON_MUXED_OUT
MUX_OUT from MUX_IN inputs and NON_MUXED_OUT
MUX_OUT and NON_MUXED_OUT (transparent) from
MUX_OUT and NON_MUXED_OUT (transparent) from
Write to the non-volatile registers through I
latched (from EEPROM 0)
latched (from EEPROM 1)
DD
has reached V
EEPROM byte 0
EEPROM byte 1
COMMANDS
allowed
2
C.
POR
. At that point, the
PCA9560
Product data sheet
2
C bus allowed
2
C bus not
2
C-bus
2
C bus