CBTU0808EE/G,518 NXP Semiconductors, CBTU0808EE/G,518 Datasheet
CBTU0808EE/G,518
Specifications of CBTU0808EE/G,518
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CBTU0808EE/G-T
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CBTU0808EE/G,518 Summary of contents
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CBTU0808 Dual lane PCI Express port multiplexer Rev. 02 — 6 September 2007 1. General description The CBTU0808 is a dual lane port multiplexer designed to provide convenient and reliable path switching for PCI Express signals organized as ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Solder process CBTU0808EE/G Pb-free (SnAgCu solder ball compound) 5. Functional diagram CTRL[1:0] TEST[1:0] TXSA0P TXSA0N channel Tx0 TXSB0P TXSB0N RXSA0P RXSA0N channel Rx0 RXSB0P RXSB0N TXSA1P TXSA1N channel Tx1 TXSB1P TXSB1N RXSA1P RXSA1N ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration for TFBGA48 Fig 3. Ball mapping CBTU0808_2 Product data sheet ball A1 index area CTRL0 TXSB0P TXSA0P RXSA0P GND TXSB0N TXSA0N RXSA0N RXSB0P RXSB0N GND V DD TXSA1P TXSA1N TXSB1N TXSB1P GND RXSA1N RXSB1N ...
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... NXP Semiconductors 6.2 Pin description Table 2. Signal group Test and control Signal ports Power CBTU0808_2 Product data sheet Pin description Symbol Pin CTRL0 A1 CTRL1 J9 TEST0 J1 TEST1 A9 TXSA0P, TXSA0N, A4, B4, TXSB0P, TXSB0N A2, B3 RXSA0P, RXSA0N, B1, C2, RXSB0P, RXSB0N D1, D2 TXSA1P, TXSA1N, F1, F2, ...
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... NXP Semiconductors 7. Functional description 7.1 Functional description 7.1.1 General information The CBTU0808 Dual lane PCI Express port multiplexer is designed to allow port switching two PCI Express lanes (each including a Transmit and Receive channel) according to three switch configuration settings (described in switch element of the CBTU0808 is designed integrally with its package and chip ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage DD V input voltage I I input clamping current IK I output clamping current OK I output current O I continuous current through each DDC V or GND pin ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics Over recommended operating conditions, unless otherwise noted. Symbol Parameter I supply current DD Digital inputs CTRL[1:0] and TEST0 I input leakage current LI C input capacitance i Signal ports TXSA0P RXDB1N I input leakage current LI R switch on-state resistance on(sw) ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics Over recommended operating conditions, unless otherwise noted. Characterization bandwidth: 10 MHz < f Symbol Parameter t propagation delay PD t start-up time startup t reconfiguration time rcfg t output skew time sk(o) t edge skew time sk(edge) t differential skew time difference in propagation delay between two ...
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... NXP Semiconductors Table 7. Dynamic characteristics Over recommended operating conditions, unless otherwise noted. Characterization bandwidth: 10 MHz < f Symbol Parameter s reverse transmission 12 coefficient s forward transmission 21 coefficient (1) insertion loss (2) return loss Fig 4. S parameters input output Fig 5. Propagation delay CBTU0808_2 Product data sheet … ...
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... NXP Semiconductors input output Fig 7. Edge skew 12. Test information Fig 9. Test circuit CBTU0808_2 Product data sheet 0 PLH PHL 0.9 V 0.9 V 002aac277 t = sk(edge) t rising t falling sk(edge) sk(edge) TXSx, RXSx C represents board and jig and does not indicate additional capacitance. L All input pulses are supplied by generators having the following characteristics: PRR 10 MHz ...
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... NXP Semiconductors 13. Package outline TFBGA48: plastic thin fine-pitch ball grid array package; 48 balls; body 0.8 mm ball A1 index area ball A1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.25 0.90 0.35 mm 1.15 0.15 0.75 0.25 OUTLINE VERSION IEC SOT918 Fig 10. Package outline SOT918-1 (TFBGA48) ...
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... NXP Semiconductors 14. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 11. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 15. Abbreviations Table 10. Acronym CMOS PCI PCIe DUT ESD HBM PRR 16. References [1] PCI Express Base Specification, Rev 1.1 — Revision 1.1, March 2005. ...
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... Document ID Release date CBTU0808_2 20070906 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 2 • Table 4 “Limiting • ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Functional description 7.1.1 General information . . . . . . . . . . . . . . . . . . . . . 5 7.1.2 Functional information . . . . . . . . . . . . . . . . . . . 5 7.1.2.1 Switch configuration . . . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions ...