PCA9541APW/03,112 NXP Semiconductors, PCA9541APW/03,112 Datasheet - Page 2

• Manufacturer Part Number: PCA9541APW/03,112
• Description: IC I2C 2:1 SELECTOR 16-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9541APW/03,112

• Package / Case: 16-TSSOP
• Applications: 2-Channel I²C Multiplexer
• Interface: I²C, SMBus
• Voltage - Supply: 2.3 V ~ 5.5 V
• Mounting Type: Surface Mount
• Maximum Operating Frequency: 400 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4937-5; 935289366112

NXP Semiconductors
2. Features
3. Applications
PCA9541A_3
Product data sheet
An active LOW reset input allows the PCA9541A to be initialized. Pulling the RESET pin
LOW resets the I
does the internal Power-On Reset (POR) function.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2-to-1 bidirectional master selector
I
PCA9541A/01 powers up with Channel 0 selected
PCA9541A/03 powers up with no channel selected and either master can take control
of the bus
Active LOW interrupt input
2 active LOW interrupt outputs
Active LOW reset input
4 address pins allowing up to 16 devices on the I
Channel selection via I
Bus initialization/recovery function
Bus traffic sensor
Low R
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Software identical for both masters
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
6.0 V tolerant inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO16, TSSOP16, HVQFN16
High reliability systems with dual masters
Gatekeeper multiplexer on long single bus
Bus initialization/recovery for slave devices without hardware reset
Allows masters without arbitration logic to share resources
2
C-bus interface logic; compatible with SMBus standards
on
switches
2
C-bus state machine and configures the device to its default state as
Rev. 03 — 16 July 2009
2-to-1 I
2
C-bus
2
C-bus master selector with interrupt logic and reset
2
C-bus
PCA9541A
© NXP B.V. 2009. All rights reserved.
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