DS25BR100TSD/NOPB National Semiconductor, DS25BR100TSD/NOPB Datasheet - Page 6

• Manufacturer Part Number: DS25BR100TSD/NOPB
• Description: IC BUFFER LVDS 3.125GBPS 8-LLP
• Manufacturer: National Semiconductor
• Type: Bufferr

Specifications of DS25BR100TSD/NOPB

• Tx/rx Type: LVDS
• Delay Time: 350ps
• Capacitance - Input: 1.7pF
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 35mA
• Mounting Type: Surface Mount
• Package / Case: 8-LLP
• Supply Current: 43mA
• Supply Voltage Range: 3V To 3.6V
• Driver Case Style: LLP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Logic Type: Buffer
• Rohs Compliant: Yes
• Data Rate: 3.125Gbps
• Data Rate Max: 3.125Gbps
• For Use With: DS25BR100EVK - BOARD EVALUATION DS25BR100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS25BR100TSDTR

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Symbol
LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-)
t
t
t
t
t
t
JITTER PERFORMANCE WITH PE = OFF AND EQ = LOW (Figures 6, 7)
t
t
t
t
t
t
JITTER PERFORMANCE WITH PE = OFF AND EQ = MEDIUM (Figures 6, 7)
t
t
t
t
t
t
JITTER PERFORMANCE WITH PE = MEDIUM AND EQ = LOW (Figures 5, 7)
t
t
t
t
t
t
PHLD
PLHD
SKD1
SKD2
LHT
HLT
RJ1A
RJ2A
DJ1A
DJ2A
TJ1A
TJ2A
RJ1B
RJ2B
DJ1B
DJ2B
TJ1B
TJ2B
RJ1C
RJ2C
DJ1C
DJ2C
TJ1C
TJ2C
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 11, 12)
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Pulse Skew |t
Part to Part Skew (Note 15)
Rise Time
Fall Time
Random Jitter (RMS Value)
Input Test Channel D
(Note 16)
Deterministic Jitter (Peak to Peak)
Input Test Channel D
(Note 17)
Total Jitter (Peak to Peak)
Input Test Channel D
(Note 18)
Random Jitter (RMS Value)
Input Test Channel E
(Note 16)
Deterministic Jitter (Peak to Peak)
Input Test Channel E
(Note 17)
Total Jitter (Peak to Peak)
Input Test Channel E
(Note 18)
Random Jitter (RMS Value)
Input Test Channel D
Output Test Channel B
(Note 16)
Deterministic Jitter (Peak to Peak)
Input Test Channel D
Output Test Channel B
(Note 17)
Total Jitter (Peak to Peak)
Input Test Channel D
Output Test Channel B
(Note 18)
PLHD
− t
Parameter
PHLD
| (Note 14)
(Note 13)
R
R
V
V
Clock (RZ)
PE = 0, EQ = 0
V
V
K28.5 (NRZ)
PE = 0, EQ = 0
V
V
PRBS-23 (NRZ)
PE = 0, EQ = 0
V
V
Clock (RZ)
PE = 0, EQ = 1
V
V
K28.5 (NRZ)
PE = 0, EQ = 1
V
V
PRBS-23 (NRZ)
PE = 0, EQ = 1
V
V
Clock (RZ)
PE = 1, EQ = 0
V
V
K28.5 (NRZ)
PE = 1, EQ = 0
V
V
PRBS-23 (NRZ)
PE = 1, EQ = 0
ID
CM
ID
CM
ID
CM
ID
CM
ID
CM
ID
CM
ID
CM
ID
CM
ID
CM
L
L
= 100Ω
= 100Ω
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 350 mV
= 1.2V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
6
Conditions
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
Min
0.03
0.06
0.07
0.12
0.10
0.13
Typ
350
350
0.5
0.5
0.5
0.5
0.5
0.5
45
45
80
80
11
10
27
29
29
1
Max
0.09
0.14
0.12
0.17
0.19
0.22
465
465
100
150
150
150
16
31
29
43
57
51
1
1
1
1
1
1
Units
UI
UI
UI
UI
UI
UI
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
P-P
P-P
P-P
P-P
P-P
P-P