AD9891KBC Analog Devices Inc, AD9891KBC Datasheet - Page 14

• Manufacturer Part Number: AD9891KBC
• Description: IC CCD SIGNAL PROC/GEN 64-CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 10-Bitr

Specifications of AD9891KBC

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Operating Supply Voltage (min): 2.7/3V
• Resolution: 10b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

AD9891/AD9895
POSITION
PERIOD
SIGNAL
NOTES
ALL SIGNAL EDGES ARE FULLY PROGRAMMABLE TO ANY OF THE 48 POSITIONS WITHIN ONE PIXEL PERIOD.
DEFAULT POSITIONS FOR EACH SIGNAL ARE SHOWN.
PIXEL
H1/H3
CCD
RG
H1/H3
H2/H4
PERIOD
PIXEL
DCLK
DOUT
NOTES
DATA OUTPUT (DOUT) AND DCLK PHASE ARE ADJUSTABLE WITH RESPECT TO THE PIXEL PERIOD.
WITHIN 1 CLOCK PERIOD, THE DATA TRANSITION CAN BE PROGRAMMED TO 48 DIFFERENT LOCATIONS.
OUTPUT DELAY (
Figure 10. High Speed Clock Default and Programmable Locations
P[0]
P[0]
RGr[0]
Hr[0]
t
t
RISE
OD
) FROM DCLK RISING EDGE TO DOUT RISING EDGE IS PROGRAMMABLE.
t
OD
Figure 11. H-Clock Inverse Phase Relationship
Figure 12. Digital Output Phase Adjustment
FIXED CROSSOVER VOLTAGE
RGf[12]
P[12]
P[12]
t
PD
–14–
<
P[24]
P[24]
Hf[24]
t
RISE
SHP[28]
H1/H3
P[36]
P[36]
t
S1
t
PD
P[48] = P[0]
P[48] = P[0]
SHD[48]
H2/H4
REV. A