54ABT573W-QML National Semiconductor, 54ABT573W-QML Datasheet - Page 2

• Manufacturer Part Number: 54ABT573W-QML
• Manufacturer: National Semiconductor
• Type: D-Typer

Specifications of 54ABT573W-QML

• Logic Family: ABT
• Number Of Bits: 8
• Number Of Elements: 1
• Latch Mode: Transparent
• Polarity: Non-Inverting
• Technology: BiCMOS
• Output Type: 3-State
• Package Type: CPAK
• Propagation Delay Time: 7.7ns
• Operating Supply Voltage (typ): 5V
• High Level Output Current: -24mA
• Low Level Output Current: 48mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / Rohs Status: Not Compliant

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Functional Description
The ’ABT573 contains eight D-type latches with TRI-STATE
output buffers. When the Latch Enable (LE) input is HIGH,
data on the D
latches are transparent, i.e., a latch output will change state
each time its D input changes. When LE is LOW the latches
store the information that was present on the D inputs a
setup time preceding the HIGH-to-LOW transition of LE. The
TRI-STATE buffers are controlled by the Output Enable (OE)
input. When OE is LOW, the buffers are in the bi-state mode.
When OE is HIGH the buffers are in the high impedance
mode but this does not interfere with entering new data into
the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
n
inputs enters the latches. In this condition the
2
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
O
0
= Value stored from previous clock cycle
OE
H
L
L
L
Inputs
LE
H
H
L
X
Function Table
D
H
L
X
X
Outputs
DS100219-3
O
O
H
L
Z
0