DS1877T+ Maxim Integrated Products, DS1877T+ Datasheet - Page 24

• Manufacturer Part Number: DS1877T+
• Description: IC CTLR/MON SFP 1-2CH 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP+ Controllerr

Specifications of DS1877T+

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 2.5mA
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 90-1877T+000

SFP Controller for Dual Rx Interface
Many nonvolatile memory locations (listed within the
Register Descriptions section) are actually shadowed
EEPROM and are controlled by the SEEB bit in Table 02h,
Register 80h.
The device incorporates shadowed EEPROM memory
locations for key memory addresses that can be writ-
ten many times. By default the shadowed EEPROM bit,
SEEB, is not set and these locations act as ordinary
EEPROM. By setting SEEB, these locations function
like SRAM cells, which allow an infinite number of write
Figure 14. Memory Map
24
00h
I
2
C ADDRESS A0h
(256 BYTES)
EEPROM
FFh
Shadowed EEPROM
00h
80h
F8h
I
2
C ADDRESS A2h/B2h
PASSWORD ENTRY
(PWE) (4 BYTES)
TABLE-SELECT
ENABLE ROW
(120 BYTES)
TABLE 01h
MEMORY
(8 BYTES)
EEPROM
LOWER
ALARM-
BYTE
7Fh
FFh
F7h
NOTE 1: IF ASEL = 0, THEN THE MAIN DEVICE I
NOTE 2: TABLE 00h DOES NOT EXIST.
NOTE 3: ALARM-ENABLE ROW CAN BE CONFIGURED TO EXIST AT TABLE 01h OR
80h
(B2h ONLY CONTAINS
RELATED REGISTERS)
TABLE CONTROL
CONFIGURATION
NONLOOKUP
RECEIVER 2-
TABLE 02h
REGISTERS
IF ASEL = 1, THEN THE MAIN DEVICE I
BY THE VALUE IN TABLE 02h, REGISTER 8Bh. A0h AND B2h ARE INVALID
SELECTIONS.
TABLE 05h USING THE MASK BIT IN TABLE 02h, REGISTER 88h.
AND
cycles without concern of wearing out the EEPROM.
This also eliminates the requirement for the EEPROM
write time, t
enabled do not affect the EEPROM, these changes are
not retained through power cycles. The power-on value
is the last value written with SEEB disabled. This func-
tion can be used to limit the number of EEPROM writes
during calibration or to change the monitor thresholds
periodically during normal operation helping to reduce
the number of times EEPROM is written. Figure 14 shows
the memory map and indicates which locations are
shadowed EEPROM.
FFh
80h
F8h
LOOKUP TABLE
TABLE 04h
OFFSET LUT
DAC1 (A2h)
DAC2 (B2h)
(72 BYTES)
DAC1/2
WR
. Because changes made with SEEB
2
2
FFh
C7h
C SLAVE ADDRESS IS A2h/B2h.
C SLAVE ADDRESS IS DETERMINED
ALARM-ENABLE ROW
CAN BE CONFIGURED
TO EXIST AT TABLE 01h
OR TABLE 05h USING
MASK BIT IN TABLE 02h,
REGISTER 88h.
F8h TABLE 05h
ALARM-ENABLE ROW
(8 BYTES)
FFh