DS1876T+ Maxim Integrated Products, DS1876T+ Datasheet - Page 54

no-image

DS1876T+

Manufacturer Part Number
DS1876T+
Description
IC CTRLR SFP DUAL LDD 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP Laser Controllerr
Datasheet

Specifications of DS1876T+

Input Type
Logic
Output Type
Logic
Interface
I²C
Current - Supply
10mA
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SFP Controller with Dual LDD Interface
Table 02h, Register A2h–A3h: V
Table 02h, Register A4h–A7h: RESERVED
Table 02h, Register A8h–A9h: BMON2 OFFSET
Table 02h, Register AAh–ABh: PMON2 OFFSET
Table 02h, Register ACh–ADh: BMON1 OFFSET
Table 02h, Register AEh–AFh: PMON1 OFFSET
Table 02h, Register B0h–B3h: PW1
54
AAh, ACh,
ABh, ADh,
A2h, A4h,
A6h, A8h,
A3h, A5h,
A7h, A9h,
_____________________________________________________________________________________
AEh
AFh
B0h
B1h
B2h
B3h
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
Allows for offset control of these voltage measurements if desired. This number is two’s complement.
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
The PWE value is compared against the value written to this location to enable PW1 access. At power-on, the
PWE value is set to all ones. Thus, writing these bytes to all ones grants PW1 access on power-on without writing
the password entry. All reads of this register are 00h.
BIT 7
BIT 7
2
2
2
2
2
S
31
23
15
9
7
2
2
2
2
2
S
30
22
14
8
6
CC
OFFSET
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory location
Nonvolatile (SEE)
FFFF FFFFh
N/A
PW2 or (PW1 and WPW1)
Nonvolatile (SEE)
2
2
2
2
2
2
15
29
21
13
7
5
2
2
2
2
2
2
14
28
20
12
6
4
2
2
2
2
2
2
13
27
19
11
5
3
2
2
2
2
2
2
12
26
18
10
4
2
2
2
2
2
2
2
11
25
17
3
9
1
BIT 0
BIT 0
2
2
2
2
2
2
10
24
16
2
8
0

Related parts for DS1876T+