PCA8574PW,118 NXP Semiconductors, PCA8574PW,118 Datasheet - Page 8

• Manufacturer Part Number: PCA8574PW,118
• Description: IC I/O EXPANDER I2C 8B 16TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA8574PW,118

• Package / Case: 16-TSSOP
• Interface: I²C
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 400 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Output Current: 50 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283761118; PCA8574PW-T; PCA8574PW-T

NXP Semiconductors
PCA8574_PCA8574A_2
Product data sheet
Fig 8. Write mode (output)
Fig 9. Read input port register
read from
data into
SDA
port
port
SCL
INT
A LOW-to-HIGH transition of SDA while SCL is HIGH is defined as the STOP condition (P). Transfer of data can be stopped
at any moment by a STOP condition. When this occurs, data present at the last acknowledge phase is valid (Output mode).
Input data is lost.
data output from port
P5 output voltage
P5 pull-up output current
INT
write to port
S A6
START condition
SDA
1
A5 A4 A3 A2 A1 A0 0
2
8.3 Reading from a port (Input mode)
S A6
START condition
slave address
t
3
v(Q)
4
All ports programmed as input should be set to logic 1. To read, the master
(microcontroller) first addresses the slave device after it receives the interrupt. By setting
the last bit of the byte containing the slave address to logic 1 the Read mode is entered.
The data bytes that follow on the SDA are the values on the ports.
If the data on the input port changes faster than the master can read, this data may be
lost.
A5 A4 A3 A2 A1 A0 1
5
slave address
6
7
R/W
8
9
A
acknowledge
from slave
t
h(D)
P7
R/W
P6 1
A
acknowledge
from slave
P5
Rev. 02 — 14 May 2007
t
P4 P3 P2 P1 P0
data 1
d(rst)
DATA 2
data from port
DATA 1
DATA 3
Remote 8-bit I/O expander for I
I
t
trt(pu)
d(rst)
t
su(D)
A
acknowledge
from slave
P7
t
v(Q)
I
0
P5
OH
A
acknowledge
from master
P5
DATA 1 VALID
t
P4 P3 P2 P1 P0
data 2
d(rst)
data from port
DATA 4
DATA 4
PCA8574/74A
A
acknowledge
from slave
2
C-bus with interrupt
DATA 2 VALID
t
© NXP B.V. 2007. All rights reserved.
v(Q)
1
no acknowledge
from master
002aac120
002aac121
P
STOP
condition
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