PCA9538BS,118 NXP Semiconductors, PCA9538BS,118 Datasheet - Page 10

• Manufacturer Part Number: PCA9538BS,118
• Description: IC I/O EXPANDER I2C 8B 16HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PCA9538BS,118

• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Includes: POR
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Logic Family: PCA9538
• Number Of Lines (input / Output): 8.0 / 8.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 200 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5 V
• Logic Type: I2C, SMBus
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8.0
• Number Of Output Lines: 8.0
• Output Current: 50 mA
• Output Voltage: 5 V
• For Use With: 568-3615 - DEMO BOARD I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1838-2; 935277417118; PCA9538BS-T

NXP Semiconductors
PCA9538_5
Product data sheet
Fig 9.
Fig 10. Read input port register
data into
SDA
(cont.)
port
INT
Read from register
read from
This figure assumes the command byte has previously been programmed with 00h.
Transfer of data can be stopped at any moment by a STOP condition.
Expanded diagram is shown in
S
START condition
SDA
port
S
(repeated)
START condition
1
SCL
1
1
S
START condition
t
slave address
v(INT)
1
1
1
1
slave address
1
2
0
1
slave address
0
3
0 A1 A0
DATA 1
1
0 A1 A0 1
4
acknowledge
0
from slave
acknowledge
5
0 A1 A0 1
R/W
from slave
Figure
6
0
R/W
7
A
t
h(D)
R/W
8-bit I
A
17.
8
9
A
acknowledge
from slave
COMMAND BYTE
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
2
Rev. 05 — 28 May 2009
C-bus and SMBus low power I/O port with interrupt and reset
DATA 2
data from register
t
DATA (first byte)
rst(INT)
data from port
DATA 1
acknowledge
from slave
DATA 3
t
su(D)
A
A
acknowledge
from master
(cont.)
A
acknowledge
from master
data from register
DATA (last byte)
data from port
DATA 4
DATA 4
no acknowledge
from master
PCA9538
© NXP B.V. 2009. All rights reserved.
NA
NA
no acknowledge
from master
002aae710
P
STOP
condition
P
STOP
condition
002aae711
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