ADV7183AKST Analog Devices Inc, ADV7183AKST Datasheet - Page 34

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ADV7183AKST

Manufacturer Part Number
ADV7183AKST
Description
IC VIDEO DECODER NTSC 80-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7183AKST

Applications
Projectors, Recorders, Security
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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ADV7183A
BETACAM Enable Betacam Levels, Address 0x01 [5]
If YPrPb data is routed through the ADV7183A, the automatic
gain control modes can target different video input levels, as
outlined in Table 71. The BETACAM bit is valid only if the
input mode is YPrPb (component). The BETACAM bit sets the
target value for AGC operation.
A review of the following sections is useful:
The automatic gain control (AGC) algorithms adjust the levels
based on the setting of the BETACAM bit (see Table 67).
Table 67. BETACAM Function
BETACAM
0 (default)
1
Table 71. Betacam Levels
Name
Y Range
Pb and Pr Range
Sync Depth
INSEL[3:0] Input Selection, Address 0x00 [3:0] to find how
component video (YPrPb) can be routed through the
ADV7183A.
Video Standard Selection to select the various standards,
for example, with and without pedestal.
Description
Assuming YPrPb is selected as input format.
Selecting PAL with pedestal selects MII.
Selecting PAL without pedestal selects SMPTE.
Selecting NTSC with pedestal selects MII.
Selecting NTSC without pedestal selects SMPTE.
Assuming YPrPb is selected as input format.
Selecting PAL with pedestal selects BETACAM.
Selecting PAL without pedestal selects BETACAM
variant.
Selecting NTSC with pedestal selects BETACAM.
Selecting NTSC without pedestal selects BETACAM
variant.
Betacam (mV)
0 to 714 (incl. 7.5% pedestal)
–467 to +467
286
Betacam Variant (mV)
0 to 714
–505 to +505
286
Rev. B | Page 34 of 104
PW_UPD Peak White Update, Address 0x2B [0]
The peak white and average video algorithms determine the
gain based on measurements taken from the active video. The
PW_UPD bit determines the rate of gain change. The LAGC[2:0]
must be set to the appropriate mode to enable the peak white or
average video mode in the first place. For more information,
refer to the LAGC[2:0] Luma Automatic Gain Control,
Address 0x2C [7:0] section.
Table 68. PW_UPD Function
PW_UPD
0
1 (default)
Chroma Gain
CAGC[1:0] Chroma Automatic Gain Control,
Address 0x2C [1:0]
The two bits of Color Automatic Gain Control mode select the
basic mode of operation for automatic gain control in the
chroma path.
Table 69. CAGC Function
CAGC[1:0]
00
01
10 (default)
11
CAGT[1:0] Chroma Automatic Gain Timing,
Address 0x2D [7:6]
The Chroma Automatic Gain Timing register allows the user to
influence the tracking speed of the chroma automatic gain
control. This register only has an effect if the CAGC[1:0]
register is set to 10 (automatic gain).
Table 70. CAGT Function
CAGT[1:0]
00
01
10
11 (default)
SMPTE (mV)
0 to 700
–350 to +350
300
Description
Update gain once per video line.
Update gain once per field.
Description
Manual fixed gain (use CMG[11:0]).
Use luma gain for chroma.
Automatic gain (based on color burst).
Freeze chroma gain.
Description
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
MII (mV)
0 to 700 (incl. 7.5% pedestal)
–324 to +324
300

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