ADV7393BCPZ Analog Devices Inc, ADV7393BCPZ Datasheet - Page 11

• Manufacturer Part Number: ADV7393BCPZ
• Description: IC DAC VIDEO HDTV 10BIT 40LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7393BCPZ

• Design Resources: Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
• Applications: Set-Top Boxes, Video Players, Displays
• Voltage - Supply, Analog: 2.6 V ~ 3.46 V
• Voltage - Supply, Digital: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 1.71V To 1.89V
• Operating Temperature Range: -40°C To +85°C
• Tv / Video Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADV7393-DBRDZ - BOARD EVAL FOR ADV7393EVAL-ADV7393EBZ - BOARD EVAL FOR ADV7393 ENCODER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

VIDEO PERFORMANCE SPECIFICATIONS
V
Table 11.
Parameter
STATIC PERFORMANCE
STANDARD DEFINTION (SD) MODE
ENHANCED DEFINITION (ED) MODE
HIGH DEFINITION (HD) MODE
1
2
3
POWER SPECIFICATIONS
V
Table 12.
Parameter
NORMAL POWER MODE
SLEEP MODE
1
2
3
4
5
Measured on DAC 1, DAC 2, and DAC 3.
Differential nonlinearity (DNL) measures the deviation of the actual DAC output voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal
step value. For −ve DNL, the actual step value lies below the ideal step value.
Measured on the ADV7392/ADV7393 operating in 10-bit input mode.
R
75% color bar test pattern applied to pixel data pins.
I
Applicable to both single data rate (SDR) and dual data rate (DDR) input modes.
I
DD
AA
DD
DD
SET
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Luminance Nonlinearity
Differential Gain
Differential Phase
Signal-to-Noise Ratio (SNR)
Luma Bandwidth
Chroma Bandwidth
Luma Bandwidth
Chroma Bandwidth
I
I
I
I
I
I
I
I
DD
DD_IO
AA
PLL
DD
AA
DD_IO
PLL
is the total current required to supply all DACs.
is the continuous current required to drive the digital core.
= 510 Ω (all DACs operating in full-drive mode).
= 1.8 V, PV
= 1.8 V, PV
5
3
DD
DD
= 1.8 V, V
= 1.8 V, V
1, 2
1
AA
AA
3
= 3.3 V, V
= 3.3 V, V
1, 2
Conditions
SD (16× oversampling enabled), CVBS (only one DAC turned on)
SD (16× oversampling enabled), YPrPb (three DACs turned on)
ED (8× oversampling enabled)
HD (4× oversampling enabled)
One DAC enabled
All DACs enabled
DD_IO
DD_IO
= 3.3 V, T
= 3.3 V, T
Conditions
R
R
NTSC
NTSC
Luma ramp
Flat field full bandwidth
SET
SET
= 510 Ω, R
= 510 Ω, R
A
A
= +25°C.
= +25°C.
Rev. B | Page 11 of 108
L
L
= 37.5 Ω
= 37.5 Ω
4
4
ADV7390/ADV7391/ADV7392/ADV7393
Min
Typ
10
0.5
0.5
0.5
0.5
0.6
58
75
12.5
5.8
30.0
13.75
Min
Max
Typ
33
68
59
81
1
50
122
4
5
0.3
0.2
0.1
Max
101
10
151
10
Unit
Bits
LSBs
LSBs
%
Degrees
dB
MHz
±%
dB
MHz
MHz
MHz
Unit
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
μA
mA