CY7C68000A-56LFXC Cypress Semiconductor Corp, CY7C68000A-56LFXC Datasheet - Page 13
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CY7C68000A-56LFXC
Manufacturer Part Number
CY7C68000A-56LFXC
Description
IC USB 2.0 TX2 TXRX 56VQFN
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Type
Transceiverr
Datasheet
1.CY7C68000A-56BAXC.pdf
(15 pages)
Specifications of CY7C68000A-56LFXC
Protocol
USB 2.0
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3685 - KIT DEV EZ-USB NX2LPCY3683 - KIT EZ-USB TX2 DEVELOPMENT
Number Of Drivers/receivers
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C68000A-56LFXC
Manufacturer:
KINGBRIGHT
Quantity:
40 000
PCB Layout Recommendations
Follow these recommendations to ensure reliable, high perfor-
mance operation
■
■
■
■
Document #: 38-08052 Rev. *H
Note
A four-layer impedance controlled board is required to maintain
signal quality
Specify impedance targets (ask your board vendor what they
can achieve)
To control impedance, maintain trace widths and trace spacing
to within written specifications
Minimize stubs to minimize reflected signals
Package Diagrams
3. Source for recommendations: EZ-USB FX2™ PCB Design Recommendations, http:///www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf
High-Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
[3]
PIN A1 CORNER
.
A
B
C
D
E
F
G
H
-C-
1
SEATING PLANE
2
SIDE VIEW
3
5.00±0.10
TOP VIEW
(continued)
4
5
Figure 7. 56 VFBGA (5 x 5 x 1.0 mm) 0.50 Pitch, 0.30 Ball BZ56
6
6
8
■
■
■
■
■
■
Connections between the USB connector shell and signal
ground must be done near the USB connector
Bypass and flyback capacitors on VBus, near the connector,
are recommended
Keep DPLUS and DMINUS trace lengths within 2 mm of each
other in length, with preferred length of 20 to 30 mm
Maintain a solid ground plane under the DPLUS and DMINUS
traces. Do not split the plane under these traces
Do not place vias on the DPLUS or DMINUS trace routing
Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm
PACKAGE WEIGHT: 0.02 grams
REFERENCE JEDEC: MO-195C
-B-
0.10(4X)
-A-
BOTTOM VIEW
8
7
Ø0.05 M C
Ø0.15 M C A B
Ø0.30±0.05(56X)
6
5.00±0.10
5
0.50
3.50
4
001-03901-*B
3
2
1
CY7C68000A
A1 CORNER
A
C
G
B
D
E
F
H
Page 13 of 15
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