CDB150X-01-Z Cirrus Logic Inc, CDB150X-01-Z Datasheet - Page 10

• Manufacturer Part Number: CDB150X-01-Z
• Description: High-efficiency PFC Demo. Board
• Manufacturer: Cirrus Logic Inc
• Series: -r

Specifications of CDB150X-01-Z

• Silicon Manufacturer: Cirrus Logic
• Kit Application Type: Power Management
• Application Sub Type: Power Factor Correction (PFC)
• Kit Contents: Board, Datasheet
• Design Resources: CS150x/160x PCB Layout Guidelines Boost Inductance vs. Inductor Size
• Featured Product: CS1501/CS1601 Power Factor Correction IC Controllers
• Main Purpose: Power Management, Power Factor Correction
• Embedded: No
• Utilized Ic / Part: CS1501
• Primary Attributes: 400V, 90W output
• Secondary Attributes: 90 ~ 265 VAC universal input
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.3 Burst Mode
Burst mode is utilized to improve system efficiency when the
system output power (P
implemented by intermittently disabling the PFC over a full
half-line period under light-load conditions, as shown in
Figure 15.
5.4 Output Power and PFC Boost Inductor
In normal operating mode, the nominal output power is
estimated by the following equation.
where:
P

V
V
f
L
<1
Equation 1 is provided for explanation purposes only. Using
substituted required design values for V
following equation:
Changing the value for the V
10
max
B
o
in(min)
link
[V]
V
P
[W]
P
o
P
in
o
o
=
=
 
by the PFC algorithm)
against boost inductor tolerances.
rated output power of the system
efficiency of the boost converter (estimated as 100%
minimum RMS line voltage is 90V, measured after
the rectifier and EMI filter
nominal PFC output voltage (must be 400V)
maximum switching frequency is 70kHz
boost inductor specified by rated power requirement
margin factor to guarantee rated output power (P
 





V

90V
Figure 15. Burst Mode
in min
V

in
Burst Threshold

2

o


) is <5% of nominal. Burst mode is
2
------------------------------------------------------------ -
2


Burst Mode
link
400V
Disable
V
-------------------------------------------------------- -
2 f
70kHz
PFC
link
Active

voltage is not recommended.
–
max
–


V
90V

in min

link
L

L
B
B


and f


400V

V
2
link

max
t [ms]
t [ms]
2
FET

V
gs
gives the
[Eq.1]
[Eq.2]
o
)
Solving Equation 2 for the PFC boost inductor, L
following equation:
If a value of the boost inductor other than that obtained from
Equation 3 above is used, the total output power capability as
well as the minimum input voltage threshold will differ
according to Equation 2. Note that if the input voltage drops
below 90Vrms and the inductance value is <L
voltage V
5.5 PFC Output Capacitor
The value of the PFC output capacitor should be chosen
based upon voltage ripple and hold-up requirements. To
ensure system stability with the digital controller, the
recommended value of the capacitor is within the range of
0.5F/watt to 2.0F/watt with a V
5.6 Output IFB Sense & Input IAC Sense
A current proportional to the PFC output voltage, V
supplied to the IC on pin IFB and is used as a feedback control
signal. This current is compared against an internal
fixed-value reference current.
The ADC is used to measure the magnitude of the I
through resistor R
compared to an internal reference current (I
Figure 16. Relative Effects of Varying Boost Inductance
L
B
=
 
link

I
FB
will drop below 400V and fall out of regulation.
Figure 17. IFB Input Pin Model


90V
IFB
90
R5
R6
. The magnitude of the I

2
R

IFB
V
IFB
------------------------------------------------------------ -
2
AC(rms)

400V
1
70kHz P
L < L
L > L
L = L
link
–
8
15k
V

V DD
90V
B
24k
B

voltage of 400V.
link
B


o


ref
400V
IFB
CS1501
2
) of 129A.
ADC
265

current is then
DS927PP6
B
B
, gives the
IFB
I
, the link
ref
current
[Eq.3]
link
, is