MT8JSF25664HZ-1G4D1 Micron Technology Inc, MT8JSF25664HZ-1G4D1 Datasheet - Page 14

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MT8JSF25664HZ-1G4D1

Manufacturer Part Number
MT8JSF25664HZ-1G4D1
Description
MICMT8JSF25664HZ-1G4D1 2GB DDR3 MODULE
Manufacturer
Micron Technology Inc
Series
-r
Datasheet

Specifications of MT8JSF25664HZ-1G4D1

Main Category
DRAM Module
Sub-category
DDR3 SDRAM
Module Type
204SODIMM
Device Core Size
64b
Organization
256Mx64
Total Density
2GByte
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Operating Current
1.92A
Number Of Elements
8
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
204
Mounting
Socket
Memory Type
DDR3 SDRAM
Memory Size
2GB
Speed
1333MT/s
Features
-
Package / Case
204-SODIMM
Lead Free Status / Rohs Status
Compliant
Table 14: Sensor and EEPROM Serial Interface Timing (Continued)
EVENT# Pin
SMBus Slave Subaddress Decoding
PDF: 09005aef83364a85
jsf8c128_256x64hz.pdf - Rev. C 1/10 EN
Parameter/Condition
Start condition setup time
Stop condition setup time
The temperature sensor also adds the EVENT# pin (open drain). Not used by the SPD
EEPROM, EVENT# is a temperature sensor output used to flag critical events that can
be set up in the sensor’s configuration register.
EVENT# has three defined modes of operation: interrupt mode, compare mode, and
critical temperature mode. The open-drain output of EVENT# under the three separate
operating modes is illustrated below. Event thresholds are programmed in the 0x01 reg-
ister using a hysteresis. The alarm window provides a comparison window, with upper
and lower limits set in the alarm upper boundary register and the alarm lower boun-
dary register, respectively. When the alarm window is enabled, EVENT# will trigger
whenever the temperature is outside the MIN or MAX values set by the user.
The interrupt mode enables software to reset EVENT# after a critical temperature thresh-
old has been detected. Threshold points are set in the configuration register by the user.
This mode triggers the critical temperature limit and both the MIN and MAX of the tem-
perature window.
The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by
the user and only returns to the logic HIGH state when the temperature falls below the
programmed thresholds.
Critical temperature mode triggers EVENT# only when the temperature has exceeded
the programmed critical trip point. When the critical trip point has been reached, the
temperature sensor goes into comparator mode, and the critical EVENT# cannot be
cleared through software.
The temperature sensor’s physical address differs from the SPD EEPROM’s physical ad-
dress: binary 0011 for A0, A1, and RW#, where A1 and A0 are the two slave subaddress
pins, and the RW# bit is the READ/WRITE flag.
If the slave base address is fixed for the temperature sensor/SPD EEPROM, then the
pins set the subaddress bits of the slave address, enabling the devices to be located any-
where within the eight slave address locations. For example, they could be set from 30h
to 3Eh.
1GB, 2GB (x64, SR) 204-Pin Halogen-Free DDR3 SDRAM SODIMM
Temperature Sensor with Serial Presence-Detect EEPROM
Symbol
t
t
SU:STO
SU:STA
14
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Min
4.7
4.0
Max
© 2010 Micron Technology, Inc. All rights reserved.
Units
µs
µs

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