PIC32MX460F512L-80V/BG Microchip Technology, PIC32MX460F512L-80V/BG Datasheet - Page 68

• Manufacturer Part Number: PIC32MX460F512L-80V/BG
• Description: 512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.20mm
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX460F512L-80V/BG

• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 32 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: XBGA-121
• Operating Temperature Range: - 40 C to + 105 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: -
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

TABLE 4-17:
TABLE 4-18:
Legend:
Note
Legend:
Note
A000
A010
A060
9800
1:
1:
CVRCON
CM1CON
CM2CON
CMSTAT
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
COMPARATOR REGISTERS MAP
COMPARATOR VOLTAGE REFERENCE REGISTERS MAP
31/15
31/15
ON
ON
ON
—
—
—
—
—
30/14
30/14
COE
COE
—
—
—
—
—
—
29/13
CPOL
CPOL
29/13
SIDL
—
—
—
—
—
28/12
28/12
—
—
—
—
—
—
—
—
27/11
27/11
(1)
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
25/9
25/9
—
—
—
—
—
—
—
—
COUT
COUT
24/8
24/8
—
—
—
—
—
—
(1)
Bits
Bits
23/7
23/7
—
—
—
—
—
—
EVPOL<1:0>
EVPOL<1:0>
CVROE
22/6
22/6
—
—
—
—
—
CVRR
21/5
21/5
—
—
—
—
—
—
—
CVRSS
CREF
CREF
20/4
20/4
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
—
—
—
—
—
19/3
19/3
—
—
—
—
—
—
—
18/2
18/2
—
—
—
—
—
—
—
CVR<3:0>
C2OUT
17/1
17/1
—
—
—
—
CCH<1:0>
CCH<1:0>
C1OUT
16/0
16/0
for more
for more
—
—
—
—
0000
00C3
0000
00C3
0000
0000
0000
0000