PIC32MX440F512HT-80V/MR Microchip Technology, PIC32MX440F512HT-80V/MR Datasheet - Page 76

• Manufacturer Part Number: PIC32MX440F512HT-80V/MR
• Description: 512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512HT-80V/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-VFQFN Exposed Pad
• Core: MIPS
• Processor Series: PIC32MX4xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Data Ram Size: 32 KB
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Operating Temperature: + 105 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-33:
TABLE 4-34:
Legend:
Note
Legend:
Note
6180
6190
61A0
61B0
6180
6190
61A0
61B0
1:
1:
PORTG
PORTG
TRISG
ODCG
TRISG
ODCG
LATG
LATG
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTG REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L, PIC32MX360F512L,
PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY
PORTG REGISTERS MAP FOR PIC32MX320F032H, PIC32MX320F064H, PIC32MX320F128H, PIC32MX340F128H,
PIC32MX340F256H, PIC32MX340F512H, PIC32MX420F032H, PIC32MX440F128H, PIC32MX440F256H AND PIC32MX440F512H
DEVICES ONLY
TRISG15
ODCG15
LATG15
31/15
RG15
31/15
—
—
—
—
—
—
—
—
—
—
—
—
TRISG14
ODCG14
LATG14
30/14
RG14
30/14
—
—
—
—
—
—
—
—
—
—
—
—
(1)
TRISG13
ODCG13
LATG13
29/13
RG13
29/13
—
—
—
—
—
—
—
—
—
—
—
—
TRISG12
ODCG12
LATG12
28/12
RG12
28/12
—
—
—
—
—
—
—
—
—
—
—
—
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISG9
TRISG9
ODCG9
ODCG9
LATG9
LATG9
25/9
RG9
25/9
RG9
—
—
—
—
—
—
—
—
TRISG8
ODCG8
TRISG8
ODCG8
LATG8
LATG8
24/8
24/8
RG8
RG8
—
—
—
—
—
—
—
—
Bits
Bits
TRISG7
ODCG7
TRISG7
ODCG7
LATG7
LATG7
23/7
RG7
23/7
RG7
—
—
—
—
—
—
—
—
TRISG6
ODCG6
TRISG6
ODCG6
LATG6
LATG6
22/6
RG6
22/6
RG6
—
—
—
—
—
—
—
—
21/5
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
20/4
20/4
Section 12.1.1 “CLR, SET and INV Registers”
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
TRISG3
TRISG3
ODCG3
ODCG3
LATG3
LATG3
19/3
RG3
19/3
RG3
—
—
—
—
—
—
—
—
TRISG2
TRISG2
ODCG2
ODCG2
LATG2
LATG2
18/2
RG2
18/2
RG2
—
—
—
—
—
—
—
—
TRISG1
ODCG1
LATG1
17/1
RG1
17/1
—
—
—
—
—
—
—
—
—
—
—
—
TRISG0
ODCG0
LATG0
16/0
RG0
16/0
for more
—
—
—
—
—
—
—
—
—
—
—
—
for more
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0000
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0000
0000
03cc
0000
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0000
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0000
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