PIC32MX440F512HT-80V/MR Microchip Technology, PIC32MX440F512HT-80V/MR Datasheet - Page 140

• Manufacturer Part Number: PIC32MX440F512HT-80V/MR
• Description: 512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512HT-80V/MR

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-VFQFN Exposed Pad
• Core: MIPS
• Processor Series: PIC32MX4xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Data Ram Size: 32 KB
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Operating Temperature: + 105 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
REGISTER 26-6:
DS61143H-page 140
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-8 Reserved: Write ‘0’; ignore read
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Range
31:24
23:16
15:8
Bit
7:0
DDPUSB: Debug Data Port Enable for USB bit
1 = USB peripheral ignores USBFRZ (U1CNFG1<5>) setting
0 = USB peripheral follows USBFRZ setting
DDPU1: Debug Data Port Enable for UART1 bit
1 = UART1 peripheral ignores FRZ (U1MODE<14>) setting
0 = UART1 peripheral follows FRZ setting
DDPU2: Debug Data Port Enable for UART2 bit
1 = UART2 peripheral ignores FRZ (U2MODE<14>) setting
0 = UART2 peripheral follows FRZ setting
DDPSPI1: Debug Data Port Enable for SPI1 bit
1 = SPI1 peripheral ignores FRZ (SPI1CON<14>) setting
0 = SPI1 peripheral follows FRZ setting
JTAGEN: JTAG Port Enable bit
1 = Enable JTAG Port
0 = Disable JTAG Port
TROEN: Trace Output Enable bit
1 = Enable Trace Port
0 = Disable Trace Port
Reserved: Write ‘1’; ignore read
31/23/15/7
DDPUSB
R/W-0
Bit
—
—
—
r-x
r-x
r-x
DDPCON: DEBUG DATA PORT CONTROL REGISTER
30/22/14/6
DDPU1
R/W-0
Bit
r-x
—
r-x
—
r-x
—
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
29/21/13/5
DDPU2
R/W-0
Bit
r-x
—
r-x
—
r-x
—
28/20/12/4
DDPSPI1
R/W-0
Bit
—
—
—
r-x
r-x
r-x
P = Programmable bit
27/19/11/3
JTAGEN
R/W-1
Bit
—
—
—
r-x
r-x
r-x
26/18/10/2
TROEN
R/W-0
Bit
r-x
—
r-x
—
r-x
—
© 2011 Microchip Technology Inc.
r = Reserved bit
25/17/9/1
Bit
—
—
—
—
r-x
r-x
r-x
r-x
24/16/8/0
Bit
—
—
—
—
r-x
r-x
r-x
r-x