MM912H634CV1AER2 Freescale Semiconductor, MM912H634CV1AER2 Datasheet - Page 184

• Manufacturer Part Number: MM912H634CV1AER2
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AER2

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.31.3.2.1
Register Global Address 0x3_FF01
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured, but subject to the following:
Freescale Semiconductor
Note:
164.
165.
Special Single-Chip Mode
BDMACT
ENBDM
Field
SDV
All Other Modes
7
6
4
ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but fully erased
UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased, else it is 0
(Flash). This is because the ENBDM bit is set by the standard BDM firmware before a BDM command can be fully transmitted and
executed.
and can only be read if not secure (see also bit description).
— ENBDM should only be set via a BDM hardware command if the BDM firmware commands are needed. (This does
— BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by the standard BDM
— All other bits, while writable via BDM hardware or standard BDM firmware write commands, should only be altered
Reset
W
R
not apply in special single chip mode).
firmware lookup table upon exit from BDM active mode.
by the BDM hardware or standard firmware lookup table as part of BDM command execution.
Enable BDM — This bit controls whether the BDM is enabled or disabled. When enabled, BDM can be made active to allow
firmware commands to be executed. When disabled, BDM cannot be made active but BDM hardware commands are still
allowed.
Note: ENBDM is set out of reset in special single chip mode. In special single chip mode with the device secured, this bit will
BDM Active Status — This bit becomes set upon entering BDM. The standard BDM firmware lookup table is then enabled
and put into the memory map. BDMACT is cleared by a carefully timed store instruction in the standard BDM firmware as part
of the exit sequence to return to user code and remove the BDM memory from the map.
Shift Data Valid — This bit is set and cleared by the BDM hardware. It is set after data has been transmitted as part of a BDM
firmware or hardware read command or after data has been received as part of a BDM firmware or hardware write command.
It is cleared when the next BDM command has been received or BDM is exited. SDV is used by the standard BDM firmware
to control program flow execution.
BDM Status Register (BDMSTS)
0
1
0
1
0
1
not be set until after the Flash erase verify tests are complete.
BDM disabled
BDM enabled
BDM not active
BDM active
Data phase of command not complete
Data phase of command is complete
ENBDM
0
(164)
7
0
0
Table 261. BDM Status Register (BDMSTS)
BDMACT
Table 262. BDMSTS Field Descriptions
= Always read zero
MM912_634 Advance Information, Rev. 4.0
6
1
0
= Unimplemented, Reserved
5
0
0
0
Description
SDV
4
0
0
TRACE
3
0
0
2
0
0
0
= Implemented (do not alter)
UNSEC
0
(165)
1
0
0
0
0
0
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