MCP795W10-I/SL Microchip Technology, MCP795W10-I/SL Datasheet - Page 10

• Manufacturer Part Number: MCP795W10-I/SL
• Description: SPI GPP RTCC, 1Kb EE, 64B SRAM, WD Timer, Event Detect, ID 14 SOIC .150in TUBE
• Manufacturer: Microchip Technology

MCP795WXX/MCP795BXX
3.3
The MCP795XXX contains a write enable latch.
This latch must be set before any EEWRITE,
SRWRITE and IDWRITE operation will be completed
internally. The EEWREN instruction will set the latch, and
the EEWRDI will reset the latch.
FIGURE 3-4:
FIGURE 3-5:
DS22280B-page 10
Write Enable (EEWREN) and Write
Disable (EEWRDI)
WRITE ENABLE SEQUENCE (EEWREN)
WRITE DISABLE SEQUENCE (EEWRDI)
SCK
CS
SO
SCK
SI
CS
SO
SI
0
0
0
0
0
1
0
1
Preliminary
High-Impedance
0
High-Impedance
0
2
2
0
0
3
3
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
• EEWRDI instruction successfully executed
• SRWRITE instruction successfully executed
• EEWRITE instruction successfully executed
• IDWRITE instruction successfully executed
0
0
4
4
1
5
1
5
1
6
0
6
0
 2011-2012 Microchip Technology Inc.
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0
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